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PDF Z87200 Data sheet ( Hoja de datos )
| Número de pieza | Z87200 | |
| Descripción | Spread-Spectrum Transceiver | |
| Fabricantes | Zilog. | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de Z87200 (archivo pdf) en la parte inferior de esta página. Total 54 Páginas | ||
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PRODUCT SPECIFICATION
4
Z87200
SPREAD-SPECTRUM TRANSCEIVER
4
FEATURES
Min
PN Rate* Max Data Speed
Device (Mchips) Rate* (Mbps) (MHz) Package
Z87200 11
2.048
20/45 100-Pin
PQFP
Note: *45 MHz only
s Complete Direct Sequence Spread-Spectrum
Transceiver in a Single CMOS IC
s Programmable Functionality Supports Many Different
Operational Modes
s Acquires Within One Symbol Duration Using Digital PN
Matched Filter
s Two Independent PN Sequences, Each up to 64 Chips
Long for Distinct Processing of the Acquisition/Preamble
Symbol and Subsequent Data Symbols
s Power Management Features
s Optional Spectral Whitening Code Generation
s Full- or Half-Duplex Operation
Benefits
s High Performance and High Reliability for Reduced
Manufacturing Costs
s Ideal for a Wide Range of Wireless Applications
Including Data Acquisition Systems, Transaction
Systems, and Wireless Local Area Networks (WLANs)
s Fast Response and Very Low Overhead when
Operating in Burst Modes
s Allows High Processing Gain to Maximize the
Acquisition Probability, then Reduced Code Length for
Increased Data Rate
s Reduced Power Consumption
s Randomizes Data to Meet Regulatory Requirements
s Permits Dual Frequency (Frequency Division Duplex) or
Single Frequency (Time Division Duplex) Operation
s Small Footprint, Surface Mount
GENERAL DESCRIPTION
The Z87200 is a programmable single-chip, spread-spec-
trum, direct-sequence transceiver. The Z87200 incorpo-
rates Stanford Telecom spread-spectrum and wireless
technology and is identical to Stanford Telecom's STEL-
2000A. By virtue of its fast acquisition capabilities and its
ability to support a wide range of data rates and spread-
spectrum parameters, the Z87200 spread-spectrum trans-
ceiver supports the implementation of a wide range of
burst data communications applications.
Available in both 45- and 20-MHz versions, the Z87200
performs all the digital processing required to implement a
fast-acquisition direct sequence (such as pseudonoise- or
PN-modulated), spread-spectrum full- or half-duplex sys-
tem. Differentially encoded BPSK and QPSK are fully sup-
ported. The receiver section can also handle differentially
encoded pi/4 QPSK. A block diagram of the Z87200 is
shown in Figure 1; its pin configuration is shown in Z87200
receive functions integrate the capabilities of a digital
downconverter, PN matched filter, and DPSK demodula-
tor, where the input signal is an analog-to-digital converted
I.F. signal. Z87200 transmit functions include a differential
BPSK/QPSK encoder, PN modulator (spreader), and
BPSK/QPSK modulator, where the transmitter output is a
sampled digitally modulated signal ready for external digi-
DS96WRL0400
4-1
1 page  
Zilog
PIN DESCRIPTION
Z87200
Spread-Spectrum Transceiver
4
VDD
N/C
RXACTIVE
RXMSMPL
MFLD
MNCOEN
RXMABRT
RXMDET
VSS
VDD
RXIIN0
RXIIN1
RXIIN2
RXIIN3
RXIIN4
RXIIN5
RXIIN6
RXIIN7
N/C
VSS
80
85
90
95
100
1
7
5
5
70 65 60
Z87200
100-Pin QFP
10 15 20
55
5
0
45
40
35
25 30
VSS
/OEN
RXTEST0
RXTEST1
RXTEST2
RXTEST3
RXTEST4
RXTEST5
RXTEST6
RXTEST7
VDD
VSS
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
VDD
Note: I.C. denotes Internal Connection. Do not use for
vias.
Figure 2. Z87200 100-Pin PQFP Pin Description
DS96WRL0400
4-5
5 Page 
Zilog
A.C. CHARACTERISTICS - RECEIVER
Operating Conditions: VDD = 5.0V ±5%, VSS = 0V
Z87200
Spread-Spectrum Transceiver
Symbol
Parameter
TA = 0° to +70°C
Min Max.
Units
f
RXIFCLK
tCH
RXIFCLK Frequency
RXIFCLK Pulse
width, High
10
45.056
20.0
MHz
MHz
ns
tCL RXIFCLK Pulse
width, Low
10
tSU RXIIN or RXQIN to
RXIFCLK setup
3
tHD RXIIN or RXQIN to
RXIFCLK hold
7
tCR RXIFCLK to
RXSPLPLS,
RXSYMPLS, or
/RXDRDY delay
tCD RXIFCLK to RXOUT,
RXIOUT, or
RXQOUT delay
35
35
ns
ns
ns
ns
ns
Notes:
1. The number of RXIFCLK cycles per cycle of RXSPLPLS is determined by the data stored in bits 5-0
of address 02H. It is shown as 2 in Figure 9, but can be set from 2 to 64.
2. The rising edge of /RXDRDY should be used to clock out the data (RXOUT, RXIOUT, or RXQOUT).
Conditions
Z8720045FSC
Z8720020FSC
4
DS96WRL0400
4-11
11 Page | ||
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| PDF Descargar | [ Datasheet Z87200.PDF ] | |
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