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PDF Z87100 Data sheet ( Hoja de datos )
| Número de pieza | Z87100 | |
| Descripción | Wireless Transmitter | |
| Fabricantes | Zilog. | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de Z87100 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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PRELIMINARY PRODUCT SPECIFICATION
3
Z87100
PN MODULATOR
WIRELESS TRANSMITTER
3
FEATURES
ROM
Part (Kbytes)
Z87100
1
Note: *General-Purpose
RAM*
(Bytes)
124
Package
Information
18-pin DIP & SOIC
s 3.0V to 5.5V Operating Range
s On-Chip PN Modulator for Spread Spectrum
Communications
s ROM-Programmable PN Codes, up to 256 Bits ("Chips")
s Fast Instruction Pointer - 1.0 µs @ 12 MHz
s Two Standby Modes - STOP and HALT
s 12 Input/Output Lines (One with Comparator Input)
s Two Programmable 8-Bit Counter/Timers
s 6-Bit Programmable Prescaler
s Six Vectored, Priority Interrupts (Two External, One
Software Generated)
s Maximum Clock Speed of 12 MHz
s Watch-Dog/Power-On Reset Timer
s Analog Comparator with Programmable Interrupt
Polarity
s On-Chip Oscillator that Accepts a RC, or External Clock
Drive
s Low EMI Noise Mode
s 0° to +70°C Ultra-Low Power Operation at 10 kHz
GENERAL DESCRIPTION
The Z87100 Wireless Controller is a member of the Z8®
single-chip microcontroller family and is manufactured in
CMOS technology. Zilog’s CMOS Z87100 microcontroller
offers fast execution, efficient use of memory, sophisticat-
ed interrupts, input/output bit manipulation capabilities,
and easy hardware/software system expansion along with
low cost and low power consumption.
The Z87100 architecture is based on Zilog’s 8-bit micro-
controller core with the addition of an Expanded Register
File which allows access to register mapped peripheral
and I/O circuits. The Z87100 offers a flexible I/O scheme
and a number of ancillary features that are useful in many
consumer, industrial, automotive, and advanced scientific
applications.
The Z87100 is designed with specific features for wireless
spread spectrum applications using direct sequence pseu-
do-noise (PN) modulation. With up to 256 bits (“chips”) of
specially designated “PN ROM”, one or more PN code se-
quences may be stored and used to PN-modulate data
generated by the Z87100. PN modulation is synchronous
with the data, using an integer number of PN chips per data
bit.
The Z87100 features an Internal Time Base Counter which
provides a real time clock for Stop-Mode Recovery or inter-
rupt at programmable intervals of 0.25 seconds, one sec-
ond, one minute and one hour. This requires an external
clock oscillator signal at 32.768 kHz.
Special PN modulator control registers allow the user to
select the desired PN modulator outputs, to choose the PN
clock source and PN sequence start address in PN ROM,
to stop/start and enable/disable the PN modulator, and to
determine whether a complete PN code sequence is mod-
ulated against a single bit or an integer fraction or multiple
of a single bit. The PN-modulated data may then be used
DS96WRL0700
PRELIMINARY
3-1
1 page  
Zilog
DC ELECTRICAL CHARACTERISTICS
Z87100
Wireless Transmitter
Sym Parameter
Max Input
Voltage
VCH Clock Input
High Voltage
VCL Clock Input
Low Voltage
VIH Input High
Voltage
VIL Input Low
Voltage
VOH Output High
Voltage
VOL1
Output Low
Voltage
VOL2
Output Low
Voltage
VOFFSET
IIL
Comparator
Input Offset
Voltage
Input Leakage
(Input bias
current of
comparator)
VCC
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
TA= 0°C to +70°C
Min Max
12
12
0.9 VCC
0.9 VCC
VSS –0.3
VSS –0.3
0.7 VCC
0.7 VCC
VSS –0.3
VSS –0.3
VCC –0.4
VCC –0.4
VCC +0.3
VCC +0.3
0.2 VCC
0.2 VCC
VCC +0.3
VCC +0.3
0.2 VCC
0.2 VCC
0.8
0.4
1.0
1.0
25
25
Typical
@ 25°C
2.4
3.9
1.6
2.7
1.8
2.8
1.0
1.5
3.1
4.8
0.2
0.1
0.4
0.5
10
10
Units
Conditions
V IIN ≤ 250 µA
V IIN ≤ 250 µA
V Driven by External Clock
V Generator
V Driven by External Clock
V Generator
V
V
V
V
V IOH = –2.0 mA
V IOH = –2.0 mA
V IOL=+4.0 mA
V IOL=+4.0 mA
V IOL= 6 mA, 3 Pin Max
V IO = +12 mA, 3 Pin Max
mV
mV
Notes
–1.0 1.0
–1.0 1.0
µA VIN = OV, VCC
µA VIN = OV, VCC
3
DS96WRL0700
PRELIMINARY
3-5
5 Page 
Zilog
Port 3 (P36-P31). Port 3 is a 4-bit, CMOS-compatible port.
These four lines consist of two fixed inputs (P31, P33) and
two fixed outputs (P36-P35). P31 and P33 are standard
CMOS inputs (no auto latch) and P35 and P36 are push-
pull outputs. An on-board comparator can process analog
signals on P31 with reference to the voltage on P33, where
this analog function is enabled by programming Port 3
Mode Register (bit 1). P31 is programmable as falling, ris-
Z87100
Wireless Transmitter
ing, or both edge triggered interrupts (IRQ register bits 6
and 7). Access to Counter/Timer 1 is made through P31
(TIN) and P36 (TOUT).
When the PN modulator is enabled, P35 is automatically
configured as the output for the PN spread data, and, if de-
sired, P36 may be programmed as the PN clock output
(Figures 7 and 8).
3
P36
Z87100
P35
P33
P31
Port 3
Port 3
(I/O or Control)
R247 = P3M
1 = Analog
D1 0 = Digital
P31 (AN1)
P33 (REF)
+
-
DIG.
AN.
IRQ2, TIN, P31 Data Latch
Stop Mode Recovery Source
IRQ1, P33 Data Latch
Figure 7. Port 3 Configuration (P31, P33)
DS96WRL0700
PRELIMINARY
3-11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet Z87100.PDF ] | |
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