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PDF Z86C93 Data sheet ( Hoja de datos )
| Número de pieza | Z86C93 | |
| Descripción | CMOS Z8 MULT/DIV MICROCONTROLLER | |
| Fabricantes | Zilog. | |
| Logotipo |  |
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Z86C93
CPS DC-4020-12
CUSTOMER PROCUREMENT SPECIFICATION
GENERAL DESCRIPTION
The Z86C93 is a CMOS ROMless Z8 microcontroller en-
hanced with a hardwired 16-bit x 16-bit multiplier,
32-bit/16-bit divider, and three 16-bit counter timers (see
Functional Block Diagram). A capture register and a fast
decrement mode are also provided. It is offered in 40-pin
PDIP, 44-pin PLCC, 44-pin QFP, and 48-pin VQFP pack-
ages. The Z86C93 is functionally compatible with the
Z86C91, yet it offers a more powerful mathematical capa-
bility. In the PDIP package, the Z86C93 is fully pin compat-
ible with the Z86C91. In the PLCC package, the Z86C93 is
also pin compatible to the Z86C91, with the addition of four
signals (SCLK, /IACK, /SYNC, and /WAIT). The /WAIT
signal is only available on the 25 MHz and 33 MHz devices.
The Z86C93 provides up to 16 output address lines permit-
ting an address space of up to 64 Kbytes of data and
program memory each. Eight address outputs (AD7-AD0)
are provided by a multiplexed, 8-bit, Address/Data bus.
The remaining 8 bits can be provided by the software
configuration of Port 0 to output address bits A15-A8.
Z86C93
CMOS Z8® MULT/DIV
MICROCONTROLLER
There are 256 registers located on chip and organized as
236 general-purpose registers, 16 control and status reg-
isters, one reserved register, and up to three I/O port
registers. The register file can be divided into 16 groups of
16 working registers each. Configuration of the registers in
this manner allows the use of short format instructions; in
addition, any of the individual registers can be accessed
directly. There are an additional 17 registers implemented
in the Expanded Register File in Banks D and E. Two of the
registers may be used as general-purpose registers, while
15 registers supply the data and control functions for the
Multiply/Divide Unit and additional Counter/Timer blocks.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
VCC
GND
VDD
V
SS
DC-4020-12 (2-16-94)
1
1 page  
ABSOLUTE MAXIMUM RATINGS
Symbol Description
VCC Supply Voltage*
TSTG Storage Temp
T Oper Ambient Temp
A
Min Max Units
–0.3 +7.0
–65 +150
††
V
C
C
* Voltages on all pins with respect to GND.
† See Ordering Information
Z86C93
CPS DC-4020-12
Stress greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
is a stress rating only; operation of the device at any
condition above those indicated in the operational sec-
tions of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended pe-
riod may affect device reliability.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load
Diagram).
DUT
Device Under Test
I OL
V Commutation
50 pf
IOH
Test Load Diagram
5
5 Page 
AC CHARACTERISTICS
Additional Timing Diagram
Clock
T IN
7
IRQ N
1
2
7
45
6
89
3
2
Additional Timing
3
Z86C93
CPS DC-4020-12
AC CHARACTERISTICS
Additional Timing Table
No Symbol Parameter
33 MHz
Min Max
TA = 0°C to +70°C
25 MHz
20 MHz
Min Max Min Max
1 TpC
2 TrC,TfC
3 TwC
4 TwTinL
Input Clock Period
Clock Imput Rise & Fall Times
Input Clock Width
Timer Input Low Width
30 1000 42
5
10 11
75 75
1000
10
50 1000
10
15
75
5 TwTinH
6 TpTin
7 TrTin,TfTin
8A TwIL
Timer Input High Width
3 TpC
Timer Input Period
8 TpC
Timer Input Rise & Fall Times 100
Interrupt Request Input Low Times 70
3 TpC
8 TpC
100
70
3 TpC
8 TpC
100
70
8B TwIL
9 TwIH
Interrupt Request Input Low Times 5 TpC
Interrupt Request Input High Times 3 TpC
5 TpC
3 TpC
5 TpC
3 TpC
Units
ns
ns
ns
ns
ns
ns
Notes:
[1] Clock timing references use 3.8V for a logic 1 and 0.8V for a logic 0.
[2] Timing references use 2.0V for a logic 1 and 0.8V for a logic 0.
[3] Interrupt references request through Port 3.
[4] Interrupt request via Port 3 (P33-P31)`.
[5] Interrupt request via Port 30.
Notes
[1]
[1]
[1]
[2]
[2]
[2]
[2]
[2,4]
[2,5]
[2,3]
11
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet Z86C93.PDF ] | |
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