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Z86C63 fiches techniques PDF

Zilog. - CMOS Z8 32K ROM MICROCONTROLLER

Numéro de référence Z86C63
Description CMOS Z8 32K ROM MICROCONTROLLER
Fabricant Zilog. 
Logo Zilog. 





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Z86C63 fiche technique
PRELIMINARY
Z86C63/64
CPS DC-5461-02
PRELIMINARY
CUSTOMER PROCUREMENT SPECIFICATION
GENERAL DESCRIPTION
The Z86C63/64 microcontroller introduces a new level of
sophistication to single-chip architecture. The Z86C63/64
is a member of the Z8 single-chip microcontroller family
with 32 Kbytes of ROM and 256 bytes of RAM.
The Z86C63 is housed in a 40-pin DIP, and a 44-pin PLCC
package, and is manufactured in CMOS technology. The
ROMless pin option is available on the 44-pin version only.
The Z86C64 is housed in a 64-pin DIP, and a 68-pin PLCC.
Both versions of the Z86C64 have the ROMless pin option,
which allows both external memory and preprogrammed
ROM, enabling this Z8 microcontroller to be used in high-
volume applications or where code flexibility is required.
The Z86C96 ROMless Z8 will support the Z86C63/64.
Zilog’s CMOS microcontroller offers fast execution, more
efficient use of memory, more sophisticated interrupts,
input/output bit manipulation capabilities, and easy hard-
ware/software system expansion along with low cost and
low power consumption.
The Z86C63/64 architecture is characterized by Zilog’s
8-bit microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many indus-
trial and advanced scientific applications.
Z86C63/64
CMOS Z8®
32K ROM MICROCONTROLLER
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Data
Memory, and 236 General-Purpose Registers.
To unburden the program from coping with the real-time
problems such as counting/timing and serial data commu-
nication, the Z86C63/64 offers two on-chip counter/timers
with a large number of user selectable modes, and an
asynchronous receiver/transmitter (UART) (see Block Dia-
grams).
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
VCC
GND
Device
VDD
V
SS
For applications which demand powerful I/O capabilities,
the Z86C63 fulfills this with 32 pins dedicated to input and
output. These lines are grouped into four ports with eight
lines each. The Z86C64 has 52 pins for input and output,
and these lines are grouped into six, 8-bit ports and one
4-bit port. Each port is configurable under software control
to provide timing, status signals, serial or parallel
I/O with or without handshake, and an address/data bus
for interfacing external memory.
DC-5461-02 (12-13-93)
1

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