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PDF HMS99C51 Data sheet ( Hoja de datos )
| Número de pieza | HMS99C51 | |
| Descripción | 8-BIT SINGLE-CHIP MICROCONTROLLERS | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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HYNIX SEMICONDUCTOR INC.
8-BIT SINGLE-CHIP MICROCONTROLLERS
HMS99C51
HMS99C52
User’s Manual (Ver. 1.0)
1 page  
HMS99C5X Series
HMS99C52
• Fully compatible to standard MCS-51 microcontroller
• Wide operating frequency up to 40MHz
(for more detail, see “HMS99C5X Series Selection Guide”)
• X2 Speed Improvement capability ( X2 Mode : 6 clocks/machine cycle)
20MHz @5V (Equivalent to 40MHz @5V)
• 8K bytes FLASH ROM
• 256 × 8Bit RAM
• 64K external program memory space
• 64K external data memory space
• Four 8-bit ports
• Three 16-bit Timers / Counters (Timer2 with up/down counter feature)
• USART
• One clock output port
• Programmable ALE pin enable / disable (Low EMI)
• Six interrupt sources, two priority levels
• Power saving Idle and power down mode
• P-DIP-40, P-LCC-44, P-MQFP-44 package
• Temperature Ranges : -40°C ~ 85°C
Block Diagram
RAM
256 × 8
PORT 0
T0
T2
T1
CPU
8-BIT
USART
PORT 1
PORT 2
FLASH ROM
8K × 8
PORT 3
I/O
I/O
I/O
I/O
Jan. 2003 Ver 1.0
1
5 Page 
HMS99C5X Series
Symbol
XTAL1
P2.0-P2.7
PSEN
RESET
Pin Number
PLCC-
44
PDIP-
40
MQFP-
44
21 19 15
24-31 21-28 18-25
32 29 26
10 9
4
Input/
Output
Function
I XTAL1
Input to the inverting oscillator amplifier and input to
the internal clock generator circuits.To drive the
device from an external clock source, XTAL1 should
be driven, while XTAL2 is left unconnected. There are
no requirements on the duty cycle of the external
clock signal, since the input to the internal clocking
circuitry is divided down by a divide-by-two flip-flop.
Minimum and maximum high and low times as well as
rise fall times specified in the AC characteristics must
be observed.
I/O Port 2
Port 2 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 2 pins that have 1s written to them are
pulled high by the internal pull-up resistors and can be
used as inputs. As inputs, port 2 pins that are
externally pulled low will source current because of
the pulls-ups (IIL, in the DC characteristics).Port 2
emits the high-order address byte during fetches from
external program memory and during accesses to
external data memory that use 16-bit addresses
(MOVX @DPTR). In this application it uses strong
internal pull-ups when emitting 1s. During accesses to
external data memory that use 8-bit addresses
(MOVX @Ri), port 2 emits the contents of the P2
special function register.
O The Program Store Enable
The read strobe to external program memory when
the device is executing code from the external
program memory. PSEN is activated twice each
machine cycle, except that two PSEN activations are
skipped during each access to external data memory.
PSEN is not activated during fetches from internal
program memory.
I RESET
A high level on this pin for two machine cycles while
the oscillator is running resets the device. An internal
diffused resistor to VSS permits power-on reset using
only an external capacitor to VCC.
Jan. 2003 Ver 1.0
7
11 Page | ||
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