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PDF SAA5284GP Data sheet ( Hoja de datos )
| Número de pieza | SAA5284GP | |
| Descripción | Multimedia video data acquisition circuit | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
SAA5284
Multimedia video data acquisition
circuit
Objective specification
Supersedes data of 1997 Mar 03
File under Integrated Circuits, IC22
1998 Feb 05
1 page  
Philips Semiconductors
Multimedia video data acquisition circuit
7 PINNING INFORMATION
7.1 Pinning
handbook, full pagewidth
Objective specification
SAA5284
RESET 1
HREF 2
SDA 3
SCL 4
DENB 5
VDDX 6
OSCOUT 7
OSCIN 8
OSCGND 9
SEL0 10
SEL1 11
SAA5284
33 WR(1)
32 RDY(1)
31 INT
30 A2(1)
29 A1(1)
28 A0(1)
27 D0(1)
26 D1(1)
25 D2(1)
24 D3(1)
23 D4(1)
MGG739
(1) Multi-functional pin.
Fig.2 Pin configuration.
7.2 Pin description
Table 1 QFP44 package
The IC has a total of 44 pins; many of these are multi-functional due to the multiple host block modes of operation.
SYMBOL
RESET
HREF
SDA
SCL
DENB
VDDX
OSCOUT
OSCIN
PIN
1
2
3
4
5
6
7
8
I/O DESCRIPTION
I reset IC
I video horizontal reference signal (digital video mode only)
I/O serial data port for I2C-bus, open-drain
I serial clock input for I2C-bus
O data enable bar (for external buffers)
− +5 V supply
O oscillator output
I oscillator input
1998 Feb 05
5
5 Page 
Philips Semiconductors
Multimedia video data acquisition circuit
Objective specification
SAA5284
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
I2C-bus timings (see note 2 and Fig.8)
fi(SCL)
tLOW
tHIGH
tSU;DAT
tHD;DAT
tSU;STO
tBUF
tHD;STA
tSU;STA
tr
tf
SCL input clock frequency
SCL LOW time
SCL HIGH time
data set-up time
data hold time
set-up time STOP condition
bus free time
hold time START condition
set-up time repeated START
rise time (SDA and SCL)
fall time (SDA and SCL)
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
fi(SCL) = 100 kHz
fi(SCL) = 400 kHz
0−
0−
4.7 −
1.3 −
4.0 −
0.6 −
250 −
100 −
0−
0−
4.7 −
0.6 −
4.7 −
1.3 −
4.0 −
0.6 −
4.7 −
0.6 −
−−
−−
−−
−−
100
400
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
1 000
300
300
300
kHz
kHz
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
Notes
1. ESD protection of this pin falls below the Philips General Quality Specification (GQS). Therefore it is recommended
that a diode is connected from pin RDY to VDDD.
2. The I2C-bus interface pins SDA and SCL may pull the data and clock lines below 3 V while the digital power supply
VDDD is in the range 0.4 to 0.8 V.
1998 Feb 05
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet SAA5284GP.PDF ] | |
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