PDF JLC1562BN Data sheet ( Hoja de datos )

Número de pieza	JLC1562BN
Descripción	I2C Bus I/O Expander
Fabricantes	ON Semiconductor
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No Preview Available ! JLC1562B I2C Bus I/O Expander The JLC1562B facilitates easy I2C Bus expandibility. Multiple devices (up to 8 on the same I2C Bus) are easily added as each device has its own selectable 3−bit address. The JLC1562B provides an 8−bit bidirectional input/output port and 6−bit resolution Digital to Analog Converter. The voltage on pins P0−P4 is compared with a controllable threshold voltage and the results are readable through the I2C Bus. I2C Bus interface pins SDA, SCL and A0−A2 are; Serial Data, Serial Clock and Device Address respectively. External interface pins are P0−P7 and VDAC; I/O Port and D/A output. Features • Pb−Free Packages are Available* • Low Power Dissipation • I2C−Bus Format (2−Wire Type; SDA, SCL) Data Transfer • 6−bit DAC • Bus Address Selectable (3−bit) • Address Input Pins are Pulled Up to VDD with Internal Resistor • I/O Pins are Open Drain Outputs • 5 Comparators at Inputs • Inputs Protected from External Bus Currents in Power Down Mode A0 1 A1 2 A2 3 P0 4 P1 5 P2 6 P3 7 VSS 8 16 VDD 15 SDA 14 SCL 13 VDAC 12 P7 11 P6 10 P5 9 P4 Figure 1. Pin Assignment A0−A2 P0−P4 P5−P7 SCL SDA VDAC PIN LIST Chip Address Input Comparator Input / Open Drain Output Comparator Input / Open Drain Output Serial Clock Input I2C Data Output DAC Output http://onsemi.com PDIP−16 N SUFFIX CASE 648 EIAJ−16 F SUFFIX CASE 966 MARKING DIAGRAMS 16 JLC1562BN AWLYYWW 1 16 JLC1562B ALYW 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week ORDERING INFORMATION Device Package Shipping† JLC1562BN PDIP−16 500 / Unit PAK JLC1562BNG PDIP−16 (Pb−Free) 500 / Unit PAK JLC1562BF JLC1562BFEL EIAJ−16 (Pb−Free) EIAJ−16 (Pb−Free) 50 Units / Rail 2000 Units / Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2004 July, 2004 − Rev. 4 1 Publication Order Number: JLC1562B/D 1 page JLC1562B READ / WRITE MODES MODE READ SDA Master Device Slave Device Receiver Transmitter I/O Expander I/O Port Input WRITE Transmitter Receiver Output SDA SCL Micro Controller (Master Device) I/O Expander (Slave Device) SDA SCL P0 − P7 The JLC1562B Supports the following types of Bus Cycles 1.) WRITE MODE (A) S Slave Address & R/W SACK Write Data (1) SACK P 2.) WRITE MODE (B) S Slave Address & R/W SACK Write Data (1) SACK Write Data (2) SACK P 3.) READ MODE (A) S Slave Address & R/W SACK Read Data MACK P 4.) READ MODE (B) S Slave Address & R/W SACK Read Data (1) MACK Read Data (2) MACK Read Data (3) MACK S = START Condition SACK = Slave Acknowledgement MACK = Master Acknowledgement P = STOP Condition http://onsemi.com 5 P 5 Page

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