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PDF S6B0719 Data sheet ( Hoja de datos )
| Número de pieza | S6B0719 | |
| Descripción | 160 SEG / 105 COM SEG DRIVER & CONTROLLER FOR STN LCD | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de S6B0719 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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S6B0719
160 SEG / 105 COM SEG DRIVER & CONTROLLER FOR STN LCD
Jan. 2000.
Ver. 0.4
Prepared by:
Koo-Hyung, Jung
Contents in this document are subject to change without notice. No part of this document may be reproduced or
transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express written
permission of LCD Driver IC Team.
1 page  
160 SEG / 105 COM DRIVER & CONTROLLER FOR STN LCD
PRELIMINARY SPEC. VER. 0.4
BLOCK DIAGRAM
S6B0719
VDD
V0
V1
V2
V3
V4
VSS
HPMB
V0
VR
INTRS
VEXT
REF
VOUT
C1-
C1+
C2-
C2+
C3+
C4+
C5+
VCI
160 SEGMENT
DRIVER CIRCUITS
106 COMMON
DRIVER CIRCUITS
V/F
CIRCUIT
V/R
RCIRCUIT
SEGMENT CONTROLLER
COMMON CONTROLLER
PAGE
ADDRESS
CIRCUIT
DISPLAY DATA RAM
105 X 160 = 16,800 Bits
LINE
ADDRESS
CIRCUIT
COLUMN ADDRESS
CIRCUIT
DISPLAY
TIMING
GENERATOR
CIRCUIT
STATIC
DRIVER
OSCILLATOR
V/C
CIRCUIT
INSTRUCTION DECODER & REGISTER
BUS HOLDER
STATUS REGISTER
MPU INTERFACE (PARALLEL & SERIAL)
MS
CL
SYNC
M
FRS
FR
Figure 1. Block Diagram
2
5 Page 
160 SEG / 105 COM DRIVER & CONTROLLER FOR STN LCD
PRELIMINARY SPEC. VER. 0.4
S6B0719
Table 6. Microprocessor Interface Pins
Name
I/O
Description
RESETB
I
Reset input pin
When RESETB is “L”, initialization is executed.
Parallel / Serial data input select input
PS
C68
CS1B
CS2
RS
RW_WR
PS Interface
Data /
mode
instruction
Data
Read / Write Serial clock
I H Parallel
RS
DB0 to DB7
E_RD
RW_WR
-
L Serial
RS
SID (DB7)
Write only
SCLK (DB6)
*NOTE: When PS is “L”, DB0 to DB5 are high impedance and E_RD and RW_WR
must be fixed to either “H” or “L”.
Microprocessor interface select input pin
I − C68 = "H": 6800-series MPU interface
− C68 = "L": 8080-series MPU interface
Chip select input pins
I Data / instruction I/O is enabled only when CS1B is “L” and CS2 is “H”.
When chip select is non-active, DB0 to DB7 may be high impedance.
Register select input pin
I − RS = "H": DB0 to DB7 are display data
− RS = "L": DB0 to DB7 are control data
Read / Write execution control pin
C68 MPU Type RW_WR
Description
Read/Write control input pin
H 6800-series
RW − RW = “H”: read
I − RW = “L”: write
L 8080-series
Write enable clock input pin
/WR
The data on DB0 to DB7 are latched at the rising
edge of the /WR signal.
8
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S6B0719.PDF ] | |
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