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PDF S6A0079 Data sheet ( Hoja de datos )
| Número de pieza | S6A0079 | |
| Descripción | 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD | |
| Fabricantes | Samsung semiconductor | |
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Hay una vista previa y un enlace de descarga de S6A0079 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0079
INTRODUCTION
S6A0079 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It can
display 2, or 4 lines with 5 x 8 dots format.
FUNCTIONS
• Character type dot matrix LCD driver & controller
• Internal driver: 34 common and 120 segment signal output
• Easy interface with 4-bit or 8-bit MPU
• 5 x 8 dots matrix possible
• Voltage converter for LCD drive voltage: 13V max (2 times/3 times)
• Automatic power on reset
FEATURES
• Internal memory
- Character Generator ROM (CGROM): 9,600 bits (240 characters x 5 x 8 dot)
- Character Generator RAM (CGRAM): 64 x 8 bits (8 characters x 5 x 8 dot)
- Icon RAM (CGRAM): 16 x 8 bits (80 icons max.)
- Display Data RAM (DDRAM): 96 x 8 bits (96 characters max.)
• Low power operation
- Power supply voltage range: 2.7 - 5.5V (VDD)
- LCD Drive voltage range: 3.0 - 13.0V (VDD - V5)
• CMOS process
• Duty cycle: 1/33
• Internal oscillator with an external resistor
• Bare chip available
PROGRAMMABLE DUTY CYCLES
5-Dot Font Width
Display Line
Numbers
2
4
Duty Ratio
1/33
1/33
Single-chip Operation
Displayable Characters
2-line of 48 characters
4-line of 24 characters
Possible Icons
80
80
1
1 page  
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0079
Pad Pad Name
No.
97 COM8
98 COM7
99 COM6
100 COM5
101 COM4
102 COM3
103 COM2
104 COM1
105 COM0
106 SEG120
107 SEG119
108 SEG118
109 SEG117
110 SEG116
111 SEG115
112 SEG114
113 SEG113
114 SEG112
115 SEG111
116 SEG110
117 SEG109
118 SEG108
119 SEG107
120 SEG106
121 SEG105
122 SEG104
123 SEG103
124 SEG102
125 SEG101
126 SEG100
127 SEG99
128 SEG98
129 SEG97
Table 1. Pad Location (Continued)
Coordinate
X
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
Y
-2822
-2697
-2572
-2447
-2322
-2197
-2072
-1947
-1822
-1584
-1459
-1334
-1209
-1084
-959
-834
-709
-584
-459
-334
-209
-84
40
165
290
415
540
665
790
915
1040
1165
1290
Pad
No.
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
Pad
Name
SEG96
SEG95
SEG94
SEG93
SEG92
SEG91
SEG90
SEG89
SEG88
SEG87
SEG86
SEG85
SEG84
SEG83
SEG82
SEG81
SEG80
SEG79
SEG78
SEG77
SEG76
SEG75
SEG74
SEG73
SEG72
SEG71
SEG70
SEG69
SEG68
SEG67
SEG66
SEG65
SEG64
Coordinate
X
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2187
2062
1937
1812
1687
1562
1437
1312
1187
1062
937
812
687
562
437
Y
1415
1540
1665
1790
1915
2040
2165
2290
2415
2540
2665
2790
2915
3040
3165
3290
3415
3540
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
Pad
No.
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
Pad
Name
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
Coordinate
X
312
187
62
-62
-187
-312
-437
-562
-687
-812
-937
-1062
-1187
-1312
-1437
-1562
-1687
-1812
-1937
-2062
-2187
Y
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
4119
5
5 Page 
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0079
TIMING GENERATION CIRCUIT
Timing generation circuit generates clock signals for the internal operations.
ADDRESS COUNTER (AC)
Address Counter (AC) stores DDRAM/CGRAM address, transferred from IR. After writing into (reading from)
DDRAM/CGRAM, AC is automatically increased (decreased) by 1. When RS = "Low" and R/W = "High", AC can
be read through DB0 - DB6.
CURSOR/BLINK CONTROL CIRCUIT
It controls cursor/blink ON/OFF and black/white inversion at cursor position.
LCD DRIVER CIRCUIT
LCD Driver circuit has 34 common and 120 segment signals for LCD driving. Data from CGRAM/CGROM is
transferred to 120-bit segment latch serially, which is stored to 120-bit shift latch. When each common is selected
by 34-bit common register, segment data also output through segment driver from 120-bit segment latch. In case
of 2-line or 4-line mode, COM0-COM33 have 1/33 duty ratio. COM0 (COM33) makes the data of CGRAM (Icon
RAM) enable to display icons.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S6A0079.PDF ] | |
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