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PDF S5K3A1EA01 Data sheet ( Hoja de datos )
| Número de pieza | S5K3A1EA01 | |
| Descripción | (1/3 SXGA CMOS Image Sensor) | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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1/3 INCH SXGA CMOS IMAGE SENSOR
S5K3A1EA
S5K3A1EA
(1/3” SXGA CMOS Image Sensor)
Preliminary Specification
Revision 0.4
Jun, 2004
1
1 page  
1/3 INCH SXGA CMOS IMAGE SENSOR
PIXEL ARRAY MAP
(TOP VIEW ON CHIP. DISPLAYED IMAGE WILL BE FLIPPED.)
S5K3A1EA
10 4
Active Pixels
10
4
Default Window of Interest
1280X1024
GBGBGB
RGRGRG
GBGBGB
RGRGRG
GBGBGB
RGRGRG
GBGBGB
RGRGRG
GBGBGB
RGRGRG
GBGBGB
RGRGRG
(0,0)
(14,14) read out start
point
4
10
Optical
Black Pixels
4 10
5
5 Page 
1/3 INCH SXGA CMOS IMAGE SENSOR
S5K3A1EA
AC Characteristics
(VDDH = 2.8V ± 0.25V, VDDL = 1.8V ± 0.15V, TA = -20 to + 60 °C, CL = 10pF)
Characteristic
Symbol
Condition
Main input clock frequency
fMCLK
Duty = 50%
Data output clock frequency fDCLK
-
Propagation delay time
from main input clock
tPDMV
tPDMH
VSYNC output
HSYNC output
tPDMD
DCLK output
tPDMO
DATA output
Propagation delay time
from data output clock
tPDDV
tPDDH
VSYNC output
HSYNC output
tPDDO
DATA output
Reset input pulse width
tWRST
RSTN=low(active)
Standby input pulse width
tWSTB STBYN=low(active)
NOTES:
1. TMCLK is the period of the master input clock, MCLK.
Min
6
6
-
-
-
-
-
-
-
5
4
Typ
12
12
-
-
-
-
-
-
-
-
-
Max
48
30
10
10
6
10
4
4
4
-
-
MCLK 0.5VDD
tPDMD
tPDMD
DCLK
DATA
tPDMO
HSYNC
tPDDO
tPDDH
tPDMH
tPDDV
tPDMH
tPDDH
Unit
MHz
ns
TMCLK(1)
VSYNC
tPDMV
11
11 Page | ||
| Páginas | Total 34 Páginas | |
| PDF Descargar | [ Datasheet S5K3A1EA01.PDF ] | |
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