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PDF S3C820B Data sheet ( Hoja de datos )

Número de pieza S3C820B
Descripción S3C-SERIES MICROCONTROLLERS
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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No Preview Available ! S3C820B Hoja de datos, Descripción, Manual

S3C820B
PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
S3C-SERIES MICROCONTROLLERS
Samsung’s S3C8-series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.
S3C820B MICROCONTROLLER
The S3C820B single-chip CMOS microcontroller is
fabricated using a highly advanced CMOS process
and is based on Samsung’s newest CPU
architecture.
The S3C820B is the microcontroller which has
64K-byte mask-programmable ROM and 192K-byte
mask ROM for font data.
Using a proven modular design approach, Samsung
engineers developed the S3C820B by integrating
the following peripheral modules with the powerful
SAM87 core:
— Four programmable I/O ports, excluding one
BUZ pin, for a total of 32 pins.
— Eight bit-programmable pins for external
interrupts.
— One 8-bit basic timer for oscillation stabilization
and watchdog functions (system reset).
— One 8-bit timer/counter and one 16-bit
timer/counter with selectable operating modes.
— Watch timer for real time.
The S3C820B is a versatile microcontroller for data
bank or dictionary. It is currently available in a 128-
pin QFP package.
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S3C820B pdf
S3C820B
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Pin
Names
P0.0–P0.7
P1.0–P1.7
P2.0–P2.3
P2.4–P2.7
P3.0–P3.7
T1CK
TB
TA
AS, DW, DR,
DM
T0
T0CK
Table 1-1. Pin Descriptions
Pin
Type
Pin
Description
I/O I/O port with nibble-programmable pins; schmitt
trigger input or push-pull, open-drain output and
software assignable pull-up; also configurable
as external interface address lines A8–A15.
I/O Same general characteristics as port 0; also
configurable as external interface address/data
lines AD0–AD7.
I/O I/O port with bit-programmable pins; schmitt
trigger input or push-pull output and software
assignable pull-ups. Lower nibble pins 0–3 are
configurable for external interface signals.
I/O P2.4/capture input, interval/PWM output (T0)
P2.5/timer 0 clock input (T0CK)
P2.6/system clock output (CLO)
P2.7/buzzer signal output (BUZ)
I/O I/O port with bit-programmable pins; schmitt
trigger input or push-pull output and software
assignable pull-up; P3.0–P3.7 are alternately
used for external interrupt input (noise filters,
interrupt enable and pending control);
P3.0/timer B clock output (TB)/INT0
P3.1/timer 1/A clock output (TA)/INT1
P3.2/timer 1/A clock input (T1CK)/INT2
I/O Timer A external clock input pins.
I/O Timer B and 1/A clock output pins.
I/O Output pins for external interface control
signals.
AS: address strobe
DW: data memory write
DR: data memory read
DM: data memory select
I/O Capture input or interval/PWM output.
I/O Timer 0 clock input.
Circuit
Type
3
3
5
6
4
4
4
5
6
6
Pin No.
35–28
Shared
Functions
A8–A15
43–36 AD0–AD7
52–55
AS, DW,
DR, DM
56–59
T0, T0CK,
CLO, BUZ
44–51
TB/INT0,
TA/INT1,
T1CK/INT2,
INT3–INT7
46
44
45
52–55
P3.2/INT2
P3.0/INT0
P3.1/INT1
P2.0–P2.3
56 P2.4
57 P2.5
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S3C820B arduino
S3C820B
15 ELECTRICAL DATA
ELECTRICAL DATA
OVERVIEW
In this chapter, S3C820B electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:
— Absolute maximum ratings
— D.C. electrical characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by an external interrupt
— Stop mode release timing when initiated by a Reset
— I/O capacitance
— A.C. electrical characteristics
— Input timing for external interrupts (port 0, P2.3–P2.0)
— Input timing for RESET
— Oscillation characteristics
— Oscillation stabilization time
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