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PDF IP3842A Data sheet ( Hoja de datos )
| Número de pieza | IP3842A | |
| Descripción | CURRENT MODE REGULATING PULSE WIDTH MODULATORS | |
| Fabricantes | Seme LAB | |
| Logotipo |  |
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SEME
LAB
IP1842A SERIES
IP1843A SERIES
TOP VIEW
COMP 1
8 VREF
VFB 2
7 VCC
ISENSE 3
6 OUTPUT
RT /CT 4
5 GROUND
J Package – 8 Pin Ceramic DIP
N Package – 8 Pin Plastic DIP
D-8 Package – 8 Pin Plastic (150) SOIC
TOP VIEW
COMP 1
N/C 2
VFB 3
N/C 4
ISENSE 5
N/C 6
RT /CT 7
14 VREF
13 N/C
12 VCC
11 VC
10 OUTPUT
9 GROUND
POWER
8
GROUND
CURRENT MODE
REGULATING
PULSE WIDTH
MODULATORS
FEATURES
• Guaranteed ±1% reference voltage tolerance
• Accurate oscillator discharge current
• Guaranteed ±10% frequency tolerance
• Low start–up current (<500 mA)
• Under voltage lockout with hysteresis
• Output state completely defined for all supply
and input conditions
• Interchangeable with IP and UC1842/3 series for
improved operation
• 500kHz Oscillator operation
D-14 Package – 14 Pin Plastic (150) SOIC
Order Information
Part
Number
IP1842A
IP2842A
IP3842A
IP1843A
IP2843A
IP3843A
J–Pack N–Pack
8 Pin
8 Pin
D–8
8 Pin
D–14
14 Pin
Temp.
Range
-55 to +125°C
-25 to +85°C
0 to +70°C
-55 to +125°C
-25 to +85°C
0 to +70°C
Note:
To order, add the package identifier to the
part number.
eg. IP1842AD–14
IP3843AJ
ABSOLUTE MAXIMUM RATINGS (Tcase = 25°C unless otherwise stated)
VCC Supply Voltage
(low impedance source)
(ICC < 30mA)
+30V
Self limiting
IO Output Current
±1A
Output Energy
(capacitive load)
5µJ
Analog Inputs
(pins 2 and 3)
Error Amp Output Sink Current
–0.3V to +VCC
10mA
PD
PD
PD
TSTG
TL
Power Dissipation
Derate @ Tamb > 50°C
Power Dissipation
Derate @ Tamb > 50°C
Power Dissipation
Derate @ Tcase > 25°C
Storage Temperature Range
Lead Temperature
Tamb = 25°C
Tcase = 25°C
Tcase = 25°C
J, N Packages
D Package
J, N Packages
(soldering, 10 seconds)
1W
10mW/°C
725mW
7.25mW/°C
2W
16mW/°C
–65 to 150°C
+300°C
Semelab plc. Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95
1 page  
SEME
LAB
IP1842A SERIES
IP1843A SERIES
V REF 8
RTCT 4
GND 5
APPLICATIONS INFORMATION
Oscillator Waveforms and Maximum Duty Cycle
LARGE RT
SMALL CT
VPIN4 (VPIN7 for 14 pin D package)
INTERNAL CLOCK
RT
LARGE CT
C T SMALL RT
OUTPUT – Max. Duty Cycle
VPIN6 (VPIN10 for 14 pin D package)
VPIN4 (VPIN7 for 14 pin D package)
INTERNAL CLOCK
OUTPUT – Max. Duty Cycle
VPIN6 (VPIN10 for 14 pin D package)
Oscillator timing capacitor CT is charged by VREF tc ≈ 0.55 RTCT
through RT and discharged by an internal current source.
During the discharge time, the internal clock signal
( )blanks the output to the low state. Selection of RT and
CT therefore determines both oscillator frequency and
maximum duty cycle. Charge and discharge times are
td ≈ RTCT Rn
.0063 RT – 2.3
.0063 – 4
Resultant frequency
f
=
(tc
1
+
td)
determined by the formulae:
For RT > 5kΩ,
Resultant frequency
f≈
1.8
(RTCT)
Open–Loop Laboratory Test Fixture
4.7k Ω
1k Ω
ERROR AMP
ADJUST
4.7k Ω
2N2222
100k Ω
5k Ω
ISENSE
ADJUST
RT
1 COMP
2 VFB
3 ISENSE
4 R T /C T
VREF 8
VCC 7
O/P 6
0.1
µF
0.1
µF 1k Ω
1kW
GND 5
VREF
VCC
OUTPUT
GROUND
CT
High peak current associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should
be connected close to pin 5 in a single point ground. The transistor and 5K potentiometer are used to sample the oscillator wave
form and apply an adjustable ramp to pin 3.
Semelab plc. Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IP3842A.PDF ] | |
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