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PDF intel387 Data sheet ( Hoja de datos )
| Número de pieza | intel387 | |
| Descripción | Intel387TM SX MATH COPROCESSOR | |
| Fabricantes | Intel Corporation | |
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Intel387TM SX
MATH COPROCESSOR
Y New Automatic Power Management
Low Power Consumption
Typically 100 mA in Dynamic Mode
and 4 mA in Idle Mode
Y Socket Compatible with Intel387 Family
of Math CoProcessors
Hardware and Software Compatible
Supported by Over 2100 Commercial
Software Packages
10% to 15% Performance Increase
on Whetstone and Livermore
Benchmarks
Y Compatible with the Intel386TM SX
Microprocessor
Extends CPU Instruction Set to
Include Trigonometric Logarithmic
and Exponential
Y High Performance 80-Bit Internal
Architecture
Y Implements ANSI IEEE Standard
754-1985 for Binary Floating-Point
Arithmetic
Y Available in a 68-Pin PLCC Package
See Intel Packaging Specification Order 231369
The Intel387TM SX Math CoProcessor is an extension to the Intel386TM SX microprocessor architecture The
combination of the Intel387TM SX with the Intel386TM SX microprocessor dramatically increases the process-
ing speed of computer application software that utilizes high performance floating-point operations An internal
Power Management Unit enables the Intel387TM SX to perform these floating-point operations while maintain-
ing very low power consumption for portable and desktop applications The internal Power Management Unit
effectively reduces power consumption by 95% when the device is idle
The Intel387TM SX Math CoProcessor is available in a 68-pin PLCC package and is manufactured on Intel’s
advanced 1 0 micron CHMOS IV technology
240225 – 22
Intel386 and Intel387 are trademarks of Intel Corporation
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
January 1994
Order Number 240225-009
COPYRIGHT INTEL CORPORATION 1995
1
1 page  
Intel387TM SX MATH COPROCESSOR
1 0 PIN ASSIGNMENT
The Intel387 SX Math CoProcessor pinout as
viewed from the top side of the component is shown
in Figure 1-1 VCC and VSS (GND) connections must
be made to multiple pins The circuit board should
include VCC and VSS planes for power distribution
and all VCC and VSS pins must be connected to the
appropriate plane
NOTE
Pins identified as N C should remain completely
unconnected
BUSY
PEREQ
ERROR
ADS
CMD0
NPS1
NPS2
STEN
WR
READY
READYO
CKM
CPUCLK2
NUMCLK2
RESETIN
Figure 1-1 Intel387TM SX Math CoProcessor Pinout
240225 – 1
Table 1-1 Pin Cross Reference Functional Grouping
36 D00 19 VCC
56 D01 20
4 VSS
5
9 14
35 D02 23 13 21
47 D03
8
22
25
48 D04
7
26
27
44 D05
6
31
32
45 D06
3
33
34
40 D07
2
37
38
41 D08 24 39 42
D09 28 43 55
49 D10 29 46 60
57 D11 30 50 61
D12 16 58 63
59 D13 15 62 66
54 D14 12
64
53 D15 11
51
NC
1
10
17
18
52
65
67
68
5
5
5 Page 
Intel387TM SX MATH COPROCESSOR
3 1 6 PROCESSOR INSTRUCTIONS
(ADMINISTRATIVE)
FINIT
Initialize Math CoProcessor
FLDCW Load Control Word
FSTCW Store Control Word
FLDCW Load Status Word
FSTSW Store Status Word
FSTSW AX Store Status Word to AX register
FCLEX Clear Exceptions
FSTENV Store Environment
FLDENV Load Environment
FSAVE Save State
FRSTOR Restore State
FINCSTP Increment Stack pointer
FDECSTP Decrement Stack pointer
FFREE Free Register
FNOP
No Operation
FWAIT Report Math CoProcessor Error
3 2 Register Set
Figure 3-1 shows the Intel387 SX Math CoProcessor
register set When a Math CoProcessor is present in
a system programmers may use these registers in
addition to the registers normally available on the
CPU
i386TM Microprocessor Registers
GENERAL REGISTERS
31 16 15
0
EAX AX
AH AL
EBX BX
BH BL
ECX
CX
CH CL
EDX
DX
DH DL
SEGMENT REGISTERS
15 0
CS
SS
DS
ES
FS
GS
ESI
EDI
EBP
SI
31
0
DI EIP
EFLAGS
BP
ESP SP
l
l i387TM Math CoProcessor Data Registers
l
l
l
l
79 78 64 63
0
l R0 Sign Exponent
Significand
Tag
Field
10
l R1
l
l
R2
l R3
l R4
l
l
R5
l R6
l R7
l
l
l 15
0
l Control Register
l Status Register
l
l Tag Word
l
l 47
0
l
l
Instruction Pointer (in CPU)
l Data Pointer (in CPU)
l
l
l
Figure 3-1 Intel386TM CPU and Intel387TM Math CoProcessor Register Set
11
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