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PDF IMP690A Data sheet ( Hoja de datos )
| Número de pieza | IMP690A | |
| Descripción | P POWER SUPPLY SUPERVISOR WITH BATTERY BACKUP SWITCH | |
| Fabricantes | IMP Inc | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IMP690A (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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IMP690A, 692A, 802L/M, 805L
POWER MANAGEMENT
µP Power Supply Supervisor
with Battery Backup Switch
The IMP690A/IMP692A/IMP802L/IMP802M/IMP805L simplify power
supply monitoring and control in microprocessor systems. Each circuit
implements four functions: Reset control, watchdog monitoring, battery-
backup switching and power-failure monitoring. In addition to
microprocessor reset under powerup and power-down conditions, these
devices provide battery-backup switching to maintain control in power-
loss and brown-out situations. Additional monitoring capabilities
can provide an early warning of unregulated power-supply loss before
the voltage regulator drops out. The important features of these four
functions are:
a) 1.6 second watchdog timer to keep microprocessor responsive
b) 4.40V or 4.65V VCC threshold for microprocessor reset at power-up
and power-down
c) SPDT (single-pole, double-throw) PMOS switch connects backup
power to RAM if VCC fails
d) 1.25V threshold detector for power loss or general purpose voltage
monitoring
While these features are pin–compatible with the industry standard
power–supply supervisors offered by Maxim, the IMP devices are supe-
rior replacements and can reduce power requirements by 70 percent
when compared to Maxim MAX690/MAX692A/MAX802L/MAX802M/
MAX805L devices. Short-circuit and thermal protection have also
been added.
The IMP690A/IMP802L/IMP805L generate a reset pulse when the
supply voltage drops below 4.65V, and the IMP692A/IMP802M
generate a reset below 4.40V. The IMP802L/IMP802M have power–fail
accuracy to ±2%. The IMP805L is the same as the IMP690A except that
RESET is provided instead ofRESET.
Block Diagrams
Key Features
x Design improvement over Maxim
MAX690A/692A/802L/802M/805L
— 70% lower current than Maxim:
100µA maximum
— RESET Operation to 1.1V
x Two precision supply-voltage monitor options
— 4.65V (IMP690A/802L/805L)
— 4.40V (IMP692A/802M)
x Battery-backup power switch on-chip
x Watchdog timer: 1.6 second timeout
x Power failure/low battery detection
x Short-circuit protection and thermal limiting
x Small 8-pin SO package
x No external components
x Specified over full temperature range
Applications
x Embedded control systems
x Battery–operated systems
x Intelligent instruments
x Wireless communication systems
x PDAs and handheld equipment
x µP/µC power supply monitoring
Typical Application
8
VBATT
2
VCC
Battery-Switchover
Circuit
Reset
Generator
+
1
VOUT
7 RESET
(RESET)
1.25V
3.5V
+
Watchdog
Timer
6
WDI
+
0.8V
1.25V
5
4+
PFI
IMP690A, IMP692A, IMP802L, IMP802M,
PFO
IMP805L
( ) IMP805L
3 GND
690A_03.eps
IMP, Inc.
San Jose, CA
Unregulated DC
Regulated +5V
R1
R2 +
–
0.1µF
VCC
RESET
PFI PFO
3.6V
Lithium
Battery
VBATT
GND
WDI
VOUT
IMP690A
VCC
RESET
NMI
I/O LINE
GND
CMOS
VCC RAM
GND
690A_01.eps
408-432-9100/www.impweb.com
1 page  
IMP690A, 692A, 802L, 802M, 805L
Application Information
Reset Output
It is important to initialize a microprocessor to a known state in
response to specific events that could create code execution errors
and “lock-up”. The reset output of these supervisory circuits send
a reset pulse to the microprocessor in response to power-up,
power-down/power-loss or a watchdog time-out. The reset pulse
width, tRS, is typically around 200ms and is LOW for the
IMP690A, IMP692A, IMP802 and HIGH for the IMP805L.
Power-up reset occurs when a rising VCC reaches the reset thresh-
old, VRT, forcing a reset condition in which the reset output is
asserted in the appropriate logic state for the duration of tRS.
Figure 2 shows the reset pin timing.
Power-loss or “brown-out” reset occurs when VCC dips below the
reset threshold resulting in a reset assertion for the duration of tRS.
The reset signal remains asserted as long as VCC is between VRT
and 1.1V, the lowest VCC for which these devices can provide a
guaranteed logic-low output. To ensure logic inputs connected to
the IMP690A/692A/802 RESET pin are in a known state when
VCC is under 1.1V, a 100kΩ pull-down resistor at RESET is needed:
the logic-high IMP805L will need a pull-up resistor to VCC.
A Watchdog time-out reset occurs when a logic “1” or logic “0” is
continuously applied to the WDI pin for more than 1.6 seconds.
After the duration of the reset interval, the watchdog timer starts
a new 1.6 second timing interval; the microprocessor must service
the watchdog input by changing states or by floating the WDI pin
before this interval is finished. If the WDI pin is held either HIGH
or LOW, a reset pulse will be triggered every 1.8 seconds (the 1.6
second timing interval plus the reset pulse width tRS).
Microprocessor Interface.
The IMP690 has logic-LOW RESET output while the IMP805 has
an inverted logic-HIGH RESET output. Microprocessors with bi-
directional reset pins (69HC11 for example) can pose a problem
when the supervisory circuit and the microprocessor output pins
attempt to go to opposite logic states. The problem can be
resolved by placing a 4.7kΩ resistor between the RESET output
and the microprocessor reset pin. This is shown in Figure 3. Since
the series resistor limits drive capabilities, the reset signal to other
devices should be buffered.
+ 5V
VCC
+ 0V
+ 5V
VOUT
+ 0V
+ 5V
RESET
+ 0V
+ 5V
(RESET)
+ 0V
3.0V
3.0V
+ 5V
PFO
+ 0V
( ) IMP805L
tRS
VBATT = PFI = 3.0V
IOUT = 0mA
690A_04.eps
8
VBATT
2
VCC
Battery-Switchover
Circuit
Reset
Generator
+
1
VOUT
7 RESET
(RESET)
Figure 2. Timing Diagram
Buffered RESET to Other System Components
1.25V
3.5V
+
Watchdog
Timer
6
WDI
+
0.8V
1.25V
5
4
PFI
+ PFO
IMP690A, IMP692A, IMP802L, IMP802M,
IMP805L
( ) IMP805L
3 GND
690A_03.eps
Figure 1. Block Diagram
VCC
RESET
IMP690A
4.7k
GND
VCC
RESET
GND
690A_05.eps
Figure 3. Interfacing with bi-directional microprocessor
reset inputs
5
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| PDF Descargar | [ Datasheet IMP690A.PDF ] | |
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