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KM41C4000D fiches techniques PDF

Samsung semiconductor - 4M x 1Bit CMOS Dynamic RAM with Fast Page Mode

Numéro de référence KM41C4000D
Description 4M x 1Bit CMOS Dynamic RAM with Fast Page Mode
Fabricant Samsung semiconductor 
Logo Samsung semiconductor 





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KM41C4000D fiche technique
KM41C4000D, KM41V4000D
CMOS DRAM
4M x 1Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 4,194,304 x 1bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Power supply voltage (+5V or +3.3V), access time (-5, -6 or -7), power consumption(Normal or Low power), and
package type (SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and
Hidden refresh capabilities. Furthermore, self-refresh operation is available in Low power version.
This 4Mx1 Fast Page Mode DRAM family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as main memory for main frames and mini computers, personal computer and high per-
formance microprocessor systems.
FEATURES
• Part Identification
- KM41C4000D/D-L(5V, 1K Ref.)
- KM41V4000D/D-L(3.3V, 1K Ref.)
Active Power Dissipation
Speed
-5
-6
-7
3.3V
-
220
200
Unit : mW
5V
470
415
360
Refresh Cycles
Part Refresh
NO. cycle
KM41C4000D
KM41V4000D
1K
Refresh Period
Normal L-ver
16ms 128ms
Performance Range
Speed tRAC tCAC tRC tPC
-5 50ns 15ns 90ns 35ns
-6 60ns 15ns 110ns 40ns
-7 70ns 20ns 130ns 45ns
Remark
5V only
5V/3.3V
5V/3.3V
• Fast Page Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (3.3V, L-ver only)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Common I/O using early write
• JEDEC Standard pinout
• Available in 26(20)-pin SOJ 300mil and TSOP(II)
300mil packages
• +5V±10% power supply(5V product)
• +3.3V±0.3V power supply(3.3V product)
FUNCTIONAL BLOCK DIAGRAM
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
A0~A9
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Memory Array
4,194,304 x1
Cells
Column Decoder
Data in
Buffer
D
Data out
Buffer
Q
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.

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