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PDF KGL4201 Data sheet ( Hoja de datos )
| Número de pieza | KGL4201 | |
| Descripción | 10-Gbps GaAs Family High-Speed Optical Communications System | |
| Fabricantes | OKI electronic componets | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de KGL4201 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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DATA SHEET
OKI
GaAs
PRODUCTS
10-Gbps GaAs Family
High-Speed Optical Communications System
April 1999
1 page  
KGL4201
10-GHz 8:1 Multiplexer
GENERAL DESCRIPTION
Oki’s KGL4201 is a 10-GHz 8:1 multiplexer designed to operate in 10-Gbps communication links. This
circuit synchronously merges eight 1.25-Gbps data streams, clocked at low frequency rates into a single
10-Gbps stream, clocked at the higher frequency. In the KGL4201 multiplexer, the 10-GHz master clock is
first divided by two, then by four. The lower frequency components are first multiplexed by four, then
the two groups are merged into a single data stream using the master 10-Gbps clock. Complementary
1/8 synchronous clock outputs are made available from the KGL4201 for use in synchronizing lower fre-
quency logic.
All signal interfaces are 50-Ω with direct DC coupling on the 1.25-Gbps data inputs and phase-locked
1.25-Gbps clock outputs. The 10-Gbps data output and 10-GHz clock input are AC-capacitively-coupled
for ease of interfacing at microwave speeds and reducing ground noise induced phase jitter. All package
clock and data pins are separated by either ground or supply voltage pins to control the I/O impedance,
maintain signal isolation and reduce phase noise.
The KGL4201 is shipped in a 40-pin ceramic flat-package with impedance-controlling ground plane and
flush mounting bottom heat sink.
FEATURES
• AC-coupled 10 Gbps I/O: eliminates DC
coupled phase jitter
• 1/8 clock generated on chip: easy to
synchronize downstream logic
• 2 V, 2.4 W
• Isolated I/O pins: minimize noise and
impedance variation
• Packaged in 40-pin ceramic flat-package with
ground plane and heat sink.
Oki Semiconductor
3
5 Page 
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s KGL4202 s
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply voltage for internal logic
Supply voltage for output buffer
Clock input
Data inputs
Temperature at package base under bias
Storage temperature
Symbol
VDD
VB
CK
D
TS
TST
Rated Value
Min. Max.
-0.3 2.3
-0.3 2.3
-0.3 1.5
-0.3 1.5
-45 100
-45 125
Unit
V
V
V
V
°C
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Power supply voltage for internal logic
Power supply voltage for output buffer
Operating temperature range at package base
DC CHARACTERISTICS
VDD = 2 V ±0.1 V, VB=2 V ±0.1 V TS = 0 to 70°C
Symbol
VDD
VB
TS
Parameter
Power dissipation
High-level 1/8CK output voltage
Low-level 1/8CK output voltage
Data input voltage swing
Clock input voltage swing
Symbol
P
VOH
VOL
VID
VICK
Test Condition
50-Ω load
50-Ω load
Capacitive coupling
Capacitive coupling
Rated Value
Min. Typ. Max.
1.9 2.0 2.1
1.9 2.0 2.1
0 – 70
Unit
V
V
°C
Rated Value
Min. Typ. Max.
3.2 4.0
0.85 1.3
0 0.3
0.5 0.9
0.5 0.9
Unit
W
V
V
VP-P
VP-P
AC CHARACTERISTICS
VDD = 2V ±0.1V, VB=2V ±0.1V Ts = 0 to 70°C
Parameter
Minimum clock period
Setup time (D to CK ↓)
Hold time (CK ↓ to D)
CK-D phase margin
1/8CK ↑ to valid data delay
Symbol
∆tC
tDS
tDH
∆tM
tC8Q
Test Condition
Input clock period is 100 ps
Rated Value
Min. Typ. Max.
100
-55 -45 -35
70 80 90
50 65
-40 -10 20
Unit
ps
ps
ps
ps
ps
Oki Semiconductor
9
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet KGL4201.PDF ] | |
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