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PDF IDT71256L55D Data sheet ( Hoja de datos )

Número de pieza IDT71256L55D
Descripción CMOS STATIC RAM 256K (32K x 8-BIT)
Fabricantes Integrated Device Technology 
Logotipo Integrated Device Technology Logotipo



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Integrated Device Technology, Inc.
CMOS STATIC RAM
256K (32K x 8-BIT)
IDT71256S
IDT71256L
FEATURES:
• High-speed address/chip select time
— Military: 25/30/35/45/55/70/85/100/120/150ns (max.)
— Commercial: 20/25/35/45ns (max.) Low Power only.
• Low-power operation
• Battery Backup operation — 2V data retention
• Produced with advanced high-performance CMOS
technology
• Input and output directly TTL-compatible
• Available in standard 28-pin (300 or 600 mil) ceramic
DIP, 28-pin (600 mil) plastic DIP, 28-pin (300 mil) SOJ
and 32-pin LCC
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT71256 is a 262,144-bit high-speed static RAM
organized as 32K x 8. It is fabricated using IDT’s high-
performance, high-reliability CMOS technology.
Address access times as fast as 20ns are available with
power consumption of only 350mW (typ.). The circuit also
offers a reduced power standby mode. When CS goes HIGH,
the circuit will automatically go to, and remain in, a low-power
standby mode as long as CS remains HIGH. In the full standby
mode, the low-power device consumes less than 15µW,
typically. This capability provides significant system level
power and cooling savings. The low-power (L) version also
offers a battery backup data retention capability where the
circuit typically consumes only 5µW when operating off a 2V
battery.
The lDT71256 is packaged in a 28-pin (300 or 600 mil)
ceramic DIP, a 28-pin 300 mil J-bend SOlC, and a 28-pin (600
mil) plastic DIP, and 32-pin LCC providing high board-level
packing densities.
The IDT71256 military RAM is manufactured in compliance
with the latest revision of MIL-STD-883, Class B, making it
ideally suited to military temperature applications demanding
the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
A0 V CC
ADDRESS
DECODER
262,144 BIT
MEMORY ARRAY
GND
A14
I/O 0
I/O 7
INPUT
DATA
CIRCUIT
I/O CONTROL
CS
OE
WE
CONTROL
CIRCUIT
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
7.2
2946 drw 01
AUGUST 1996
DSC-2946/7
1

1 page




IDT71256L55D pdf
IDT71256S/L
CMOS STATIC RAM 256K (32K x 8-BIT)
LOW VCC DATA RETENTION WAVEFORM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA
RETENTION
VCC
4.5V
MODE
4.5V
tCDR
VDR 2V
tR
CS
VIH
VDR
VIH
2946 drw 06
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
71256L20(1)
71256S25 71256S30(3)
71256L25 71256L30(3)
71256S35
71256L35
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max.
Read Cycle
tRC Read Cycle Time
20 —
25 — 30 — 35 —
tAA Address Access Time
— 20
— 25 — 30 — 35
tACS
tCLZ(2)
tCHZ(2)
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
— 20
5—
— 10
— 25 — 30 — 35
5— 5 — 5 —
— 11 — 15 — 15
tOE
tOLZ(2)
tOHZ(2)
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
— 10
2—
28
— 11 — 13 — 15
2— 2 — 2 —
2 10 2 12 2 15
tOH Output Hold from Address Change
5—
5— 5 — 5 —
Write Cycle
tWC Write Cycle Time
20 —
25 — 30 — 35 —
tCW Chip Select to End-of-Write
15 —
20 — 25 — 30 —
tAW Address Valid to End-of-Write
15 —
20 — 25 — 30 —
tAS Address Set-up Time
0—
0— 0 — 0 —
tWP Write Pulse Width
15 —
20 — 25 — 30 —
tWR Write Recovery Time
0—
0— 0 — 0 —
tDW
tWHZ(2)
Data to Write Time Overlap
Write Enable to Output in High-Z
11 —
— 10
13 — 14 — 15 —
— 11 — 15 — 15
tDH Data Hold from Write Time
0—
0— 0 — 0 —
tOW(2) Output Active from End-of-Write
5—
5— 5 — 5 —
NOTES:
1. 0° to +70°C temperature range only.
2. This parameter guaranteed by device characterization, but is not production tested.
3. –55° to +125°C temperature range only.
71256S45
71256L45
Min. Max. Unit
45 — ns
— 45 ns
— 45 ns
5 — ns
— 20 ns
— 20 ns
0 — ns
— 20 ns
5 — ns
45 — ns
40 — ns
40 — ns
0 — ns
35 — ns
0 — ns
20 — ns
— 20 ns
0 — ns
5 — ns
2946 tbl 11
7.2 5

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