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Integrated Device Technology - 3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS

Numéro de référence IDT74FCT163652C
Description 3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS
Fabricant Integrated Device Technology 
Logo Integrated Device Technology 





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IDT74FCT163652C fiche technique
®
Integrated Device Technology, Inc.
3.3V CMOS 16-BIT BUS
TRANSCEIVER/
REGISTERS
IDT54/74FCT163652/A/C
PRODUCT PREVIEW
FEATURES:
• 0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
• Extended commercial range of -40°C to +85°C
• VCC = 3.3V ±0.3V, Normal Range or
VCC = 2.7 to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Military product compliant to MIL-STD-883, Class B
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V
components
DESCRIPTION:
The IDT54/74FCT163652/A/C 16-bit registered transceiv-
ers are built using advanced dual metal CMOS technology.
These high-speed, low-power devices are organized as two
independent 8-bit bus transceivers with 3-state D-type regis-
ters. For example, the xOEAB and xOEBA signals control the
transceiver functions.
The xSAB and xSBA control pins are provided to select
either real time or stored data transfer. The circuitry used for
select control will eliminate the typical decoding glitch that
occurs in a multiplexer during the transition between stored
and real time data. A LOW input level selects real-time data
and a HIGH level selects stored data.
Data on the A or B data bus, or both, can be stored in the
internal D-flip-flops by LOW-to-HIGH transitions at the appro-
priate clock pins (xCLKAB or xCLKBA), regardless of the
select or enable control pins. Flow-through organization of
signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The IDT54/74FCT163652/A/C have series current limiting
resistors. This offers low ground bounce, minimal under-
shoot, and controlled output fall times–reducing the need for
external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
1OEAB
1OEBA
1CLKBA
1SBA
1CLKAB
1SAB
1A1 A REG
D
C
B REG
D
C
2OEAB
2OEBA
2CLKBA
2SBA
2CLKAB
2SAB
1B1 2A1
A REG
D
C
B REG
D
C
2B1
TO 7 OTHER CHANNELS
3084 drw 01
TO 7 OTHER CHANNELS
3084 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
8.7
AUGUST 1996
DSC-3084/2
1

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