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Integrated Device Technology - CMOS SyncFIFOO 512 x 36/ 1024 x 36/ 2048 x 36

Numéro de référence IDT723651L15PQF
Description CMOS SyncFIFOO 512 x 36/ 1024 x 36/ 2048 x 36
Fabricant Integrated Device Technology 
Logo Integrated Device Technology 





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IDT723651L15PQF fiche technique
Integrated Device Technology, Inc.
CMOS SyncFIFO
512 x 36, 1024 x 36,
2048 x 36
IDT723631
IDT723641
IDT723651
FEATURES:
• Free-running CLKA and CLKB can be asynchronous or
coincident (permits simultaneous reading and writing of
data on a single clock edge)
• Clocked FIFO buffering data from Port A to Port B
• Storage capacity: IDT723631 - 512 x 36
IDT723641 - 1024 x 36
IDT723651 - 2048 x 36
• Synchronous read retransmit capability
• Mailbox register in each direction
• Programmable Almost-Full and Almost-Empty flags
• Microprocessor interface control logic
• Input-Ready (IR) and Almost-Full (AF) flags synchronized
by CLKA
• Output-Ready (OR) and Almost-Empty (AE) flags syn-
chronized by CLKB
• Low-power 0.8-micron advanced CMOS technology
• Supports clock frequencies up to 67 MHz
• Fast access times of 11 ns
• Available in 132-pin plastic quad flat package (PQF) or
space-saving 120-pin thin quad flat package (TQFP)
• Industrial temperature range (-40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT723631/723641/723651 is a monolithic high-
speed, low-power, CMOS clocked FIFO memory. It supports
clock frequencies up to 67 MHz and has read access times as
fast as 12ns. The 512/1024/2048 x 36 dual-port SRAM FIFO
buffers data from port A to Port B. The FIFO memory has
retransmit capability, which allows previously read data to be
accessed again. The FIFO has flags to indicate empty and full
conditions and two programmable flags (almost full and al-
most empty) to indicate when a selected number of words is
FUNCTIONAL BLOCK DIAGRAM
CLKA
CSA
W/RA
ENA
MBA
Port-A
Control
Logic
RST
Reset
Logic
A0 - A35
AIRF
36
Mail 1
Register
512 x 36
1024 x 36
2048 x 36
SRAM
Write Read
Pointer Pointer
Status Flag
Logic
MBF1
RTM
RFM
B0 - B35
OR
AE
FS0/SD
FS1/SEN
Flag Offset
10 Registers
Mail 2
Register
Port-B
Control
Logic
CLKB
CSB
W/RB
ENB
MBB
MBF2
3023 drw 01
The IDT logo is a registered trademark and SyncFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1997 Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
MAY 1997
DSC-3023/3
1

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