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IDT72105L50TP fiches techniques PDF

Integrated Device Technology - CMOS PARALLEL-TO-SERIAL FIFO 256 x 16/ 512 x 16/ 1024 x 16

Numéro de référence IDT72105L50TP
Description CMOS PARALLEL-TO-SERIAL FIFO 256 x 16/ 512 x 16/ 1024 x 16
Fabricant Integrated Device Technology 
Logo Integrated Device Technology 





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IDT72105L50TP fiche technique
Integrated Device Technology, Inc.
CMOS PARALLEL-TO-SERIAL FIFO
256 x 16, 512 x 16, 1024 x 16
IDT72105
IDT72115
IDT72125
FEATURES:
• 25ns parallel port access time, 35ns cycle time
• 45MHz serial output shift rate
• Wide x16 organization offering easy expansion
• Low power consumption (50mA typical)
• Least/Most Significant Bit first read selected by asserting
the FL/DIR pin
• Four memory status flags: Empty, Full, Half-Full, and
Almost-Empty/Almost-Full
• Dual-Port zero fall-through architecture
• Available in 28-pin 300 mil plastic DIP and 28-pin SOIC
• Industrial temperature range (-40oC to +85oC) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT72105/72115/72125s are very high-speed, low-
power,dedicated, parallel-to-serial FIFOs. These FIFOs
possess a 16-bit parallel input port and a serial output port with
256, 512 and 1K word depths, respectively.
The ability to buffer wide word widths (x16) make these
FIFOs ideal for laser printers, FAX machines, local area
networks (LANs), video storage and disk/tape controller
applications.
Expansion in width and depth can be achieved using
multiple chips. IDT’s unique serial expansion logic makes this
possible using a minimum of pins.
The unique serial output port is driven by one data pin (SO)
and one clock pin (SOCP). The Least Significant or Most
Significant Bit can be read first by programming the DIR pin
after a reset.
Monitoring the FIFO is eased by the availability of four
status flags: Empty, Full, Half-Full and Almost-Empty/Almost-
Full. The Full and Empty flags prevent any FIFO data overflow
or underflow conditions. The Half-Full Flag is available in both
single and expansion mode configurations. The Almost-Empty/
Almost-Full Flag is available only in a single device mode.
The IDT72105/15/25 are fabricated using IDT’s leading
edge, submicron CMOS technology. Military grade product is
manufactured in compliance with the latest revision of Mil-
STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
RS W
D0–15
16
RESET
LOGIC
WRITE
POINTER
RAM
ARRAY
256 x 16
512 x 16
1024 x 16
READ
POINTER
RSIX
RSOX
FL/DIR
EXPANSION
LOGIC
SERIAL OUTPUT
LOGIC
FLAG
LOGIC
FF
EF
HF
AEF
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
SOCP
SO
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
5.35
2665 drw 01
DECEMBER 1996
DSC-2665/6
1

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