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PDF 74273 Data sheet ( Hoja de datos )
| Número de pieza | 74273 | |
| Descripción | OCTAL D TYPE FLIP FLOP WITH CLEAR | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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M54HC273
M74HC273
OCTAL D TYPE FLIP FLOP WITH CLEAR
. HIGH SPEED
fMAX = 67 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS273
DESCRIPTION
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 27 3F 1R
M 74H C2 73 M1 R
M 74HC 27 3B 1R
M 74H C2 73 C1 R
The M54/74HC273 is a high speed CMOS OCTAL
D-TYPE FLIP FLOP WITH CLEAR fabricated in sili-
con gate C2MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low power consumption.
Information signals applied to D inputs are trans-
ferred to the Q outputs on the positive-going edge
of the clock pulse.
When the CLEAR input is held low, the Q output are
in the low logic level independent of the other inputs.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
PIN CONNECTIONS (top view)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
October 1992
NC =
No Internal
Connection
1/11
1 page  
M54/M74HC273
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tTLH Output Transition 2.0
tTHL Time
4.5
25 75
7 15
95 110
19 22 ns
6.0 6 13 16 19
tPLH Propagation
tPHL Delay Time
(CLOCK - Q)
2.0
4.5
6.0
54 145 180 220
18 29 36 44 ns
15 25 31 37
tPLH Propagation
tPHL Delay Time
(CLEAR - Q)
2.0
4.5
6.0
60 160 200 240
20 32 40 48 ns
17 27 34 41
fMAX Maximum Clock 2.0
Frequency
4.5
6 18
4.8
4
30 56 24 20 MHz
6.0 35 66 28 24
tW(H)
tW(L)
Minimum Pulse
Width
(CLOCK)
2.0
4.5
6.0
28 75
7 15
6 13
95 110
19 22 ns
16 19
tW(L) Minimum Pulse
Width
(CLEAR)
2.0
4.5
6.0
28 75
7 15
6 13
95 110
19 22 ns
16 19
ts Minimum Set-up 2.0
Time
4.5
20 75
4 15
95 110
19 22 ns
6.0 3 13 16 19
th Minimum Hold 2.0
Time
4.5
000
0 0 0 ns
6.0 0 0 0
tREM Minimum
Removal Time
(CLEAR)
2.0
4.5
6.0
16 50 65 75
4 10 13 15 ns
39
11 13
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
43
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC/8 (per Flip FLop), and the
total CPD when n pcs of Flip Flop operate can be gained by the following equations: CPD (total) = 32 + 11 x n
5/11
5 Page 
M54/M74HC273
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
© 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
11/11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet 74273.PDF ] | |
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