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74ACT125MTC fiches techniques PDF

Fairchild Semiconductor - Quad Buffer with 3-STATE Outputs

Numéro de référence 74ACT125MTC
Description Quad Buffer with 3-STATE Outputs
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74ACT125MTC fiche technique
January 2008
74AC125, 74ACT125
Quad Buffer with 3-STATE Outputs
Features
ICC reduced by 50%
Outputs source/sink 24mA
ACT125 has TTL-compatible outputs
General Description
The AC/ACT125 contains four independent non-inverting
buffers with 3-STATE outputs.
Ordering Information
Order
Number
74AC125SC
74AC125SJ
74AC125MTC
74AC125PC
74ACT125SC
74ACT125SJ
74ACT125MTC
74ACT125PC
Package
Number
M14A
M14D
MTC14
N14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
An, Bn
On
Description
Inputs
Outputs
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
Function Table
Inputs
An Bn
LL
LH
HX
Output
On
L
H
Z
H = HIGH Voltage Level, L = LOW Voltage Level
Z = HIGH Impedance, X = Immaterial
www.fairchildsemi.com

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