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PDF 74AC125MTC Data sheet ( Hoja de datos )

Número de pieza 74AC125MTC
Descripción Quad Buffer with 3-STATE Outputs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 74AC125MTC Hoja de datos, Descripción, Manual

January 2008
74AC125, 74ACT125
Quad Buffer with 3-STATE Outputs
Features
ICC reduced by 50%
Outputs source/sink 24mA
ACT125 has TTL-compatible outputs
General Description
The AC/ACT125 contains four independent non-inverting
buffers with 3-STATE outputs.
Ordering Information
Order
Number
74AC125SC
74AC125SJ
74AC125MTC
74AC125PC
74ACT125SC
74ACT125SJ
74ACT125MTC
74ACT125PC
Package
Number
M14A
M14D
MTC14
N14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
An, Bn
On
Description
Inputs
Outputs
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
Function Table
Inputs
An Bn
LL
LH
HX
Output
On
L
H
Z
H = HIGH Voltage Level, L = LOW Voltage Level
Z = HIGH Impedance, X = Immaterial
www.fairchildsemi.com

1 page




74AC125MTC pdf
AC Electrical Characteristics for AC
Symbol
tPLH
Parameter
Propagation Delay,
Data to Output
tPHL Propagation Delay,
Data to Output
tPZH Output Enable Time
tPZL Output Enable Time
tPHZ Output Disable Time
tPLZ Output Disable Time
VCC (V)(7)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
TA = +25°C,
CL = 50pF
TA = –40°C to +85°C,
CL = 50pF
Min. Typ. Max. Min.
Max.
1.0 6.5 9.0
1.0
10.0
1.0 5.5 7.0
1.0
7.5
1.0 6.5 9.0
1.0
10.0
1.0 5.0 7.0
1.0
7.5
1.0 6.0 10.5
1.0
11.0
1.0 5.0 7.0
1.0
8.0
1.0 7.5 10.0
1.0
11.0
1.0 5.5 8.0
1.0
8.5
1.0 7.5 10.0
1.0
10.5
1.0 6.5 9.0
1.0
9.5
1.0 7.5 10.5
1.0
11.5
1.0 6.5 9.0
1.0
9.5
Note:
7. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V.
Units
ns
ns
ns
ns
ns
ns
AC Electrical Characteristics for ACT
Symbol
Parameter
tPLH Propagation Delay,
Data to Output
tPHL Propagation Delay,
Data to Output
tPZH Output Enable Time
tPZL Output Enable Time
tPHZ Output Disable Time
tPLZ Output Disable Time
Note:
8. Voltage Range 5.0 is 5.0V ± 0.5V.
VCC (V)(8)
5.0
TA = +25°C,
CL = 50pF
Min. Typ. Max.
1.0 6.5 9.0
TA = –40°C to +85°C,
CL = 50pF
Min.
Max.
1.0 10.0
Units
ns
5.0 1.0 7.0 9.0 1.0
10.0 ns
5.0 1.0 6.0 8.5 1.0
5.0 1.0 7.0 9.5 1.0
5.0 1.0 7.0 9.5 1.0
5.0
1.0 7.5 10.0
1.0
9.5 ns
10.5 ns
10.5 ns
10.5 ns
Capacitance
Symbol
CIN
CPD
Parameter
Input Capacitance
Power Dissipation Capacitance
Conditions
VCC = OPEN
VCC = 5.0V
Typ.
4.5
45.0
Units
pF
pF
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
5
www.fairchildsemi.com

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