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PDF 74ABT573A Data sheet ( Hoja de datos )
| Número de pieza | 74ABT573A | |
| Descripción | Octal D-type transparent latch 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Philips Semiconductors
Octal D-type transparent latch (3-State)
Product specification
74ABT573A
FEATURES
• 74ABT573A is flow-through pinout version of 74ABT373
• Inputs and outputs on opposite side of package allow easy
interface to microprocessors
• 3-State output buffers
• Common output enable
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
• Power-up 3-State
• Power-up reset
DESCRIPTION
The 74ABT573A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT573A device is an octal transparent latch coupled to
eight 3-State output buffers. The two sections of the device are
controlled independently by Enable (E) and Output Enable (OE)
control gates. The 74ABT573A is functionally identical to the
74ABT373 but has a flow-through pinout configuration to facilitate
PC board layout and allow easy interface with microprocessors.
The data on the D inputs are transferred to the latch outputs when
the Latch Enable (E) input is High. The latch remains transparent to
the data inputs while E is High, and stores the data that is present
one setup time before the High-to-Low enable transition.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the latch operation.
When OE is Low, the latched or transparent data appears at the
outputs. When OE is High, the outputs are in the High-impedance
”OFF” state, which means they will neither drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
COUT
ICCZ
Propagation delay
Dn to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled; VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
2.8
3.3
3
6
100
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT573A N
74ABT573A D
74ABT573A DB
74ABT573A PW
NORTH AMERICA
74ABT573A N
74ABT573A D
74ABT573A DB
74ABT573APW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 E
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1 OE Output enable input (active-Low)
2, 3, 4, 5,
6, 7, 8, 9
19, 18, 17,
16, 15, 14,
13, 12
D0-D7 Data inputs
Q0-Q7 Data outputs
11 E Enable input (active-High)
10 GND Ground (0V)
20 VCC Positive supply voltage
SA00185
1995 Sep 06
1 853–1455 15703
1 page  
Philips Semiconductors
Octal D-type transparent latch (3-State)
Product specification
74ABT573A
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
SYMBOL
PARAMETER
WAVEFORM
ts(H)
ts(L)
th(H)
th(L)
tw(H)
Setup time, High or Low
Dn to E
Hold time, High or Low
Dn to E
E pulse width
High
3
3
1
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
E VM VM VM
tw(H)
tPHL
Qn VM
tPLH
VM
SA00063
Waveform 1. Propagation Delay, Enable to Output, and Enable
Pulse Width
LIMITS
Tamb = +25oC
VCC = +5.0V
Min Typ
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
Min
1.0 0.3
1.0 0.2
1.0
1.0
1.0 –0.1
1.0 –0.2
1.0
1.0
2.0 0.7
2.0
UNIT
ns
ns
ns
OE VM VM
tPZH
tPHZ
Qn VM VOH–0.3V
0V
SA00066
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Dn VM VM
tPLH
tPHL
Qn VM VM
SA00064
Waveform 2. Propagation Delay for Data to Outputs
Dn ÉÉÉÉÉÉÉÉÉVM ÉÉÉVM ÉÉÉÉÉÉÉÉÉÉÉÉVÉÉÉM ÉÉÉVMÉÉÉÉÉÉÉÉÉ
ts(H)
th(H)
ts(L)
th(L)
E VM
VM
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00065
Waveform 3. Data Setup and Hold Times
OE VM VM
tPZL
tPLZ
Qn VM VOL+0.3V
VOL
SA00332
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
1995 Sep 06
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74ABT573A.PDF ] | |
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