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PDF IDT54FCT3573ASO Data sheet ( Hoja de datos )
| Número de pieza | IDT54FCT3573ASO | |
| Descripción | 3.3V CMOS OCTAL TRANSPARENT LATCHES | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Integrated Device Technology, Inc.
3.3V CMOS OCTAL
TRANSPARENT
LATCHES
IDT54/74FCT3573/A
ADVANCE INFORMATION
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• 25 mil Center SSOP Packages
• Extended commercial range of -40°C to +85°C
• VCC = 3.3V ±0.3V, Normal Range or
VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The FCT3573/A are octal transparent latches built using an
advanced dual metal CMOS technology.
These octal latches have 3-state outputs and are intended
for bus oriented applications. The flip-flops appear transpar-
ent to the data when Latch Enable (LE) is HIGH. When LE is
LOW, the data that meets the set-up time is latched. Data
appears on the bus when the Output Enable (OE) is LOW.
When OE is HIGH, the bus output is in the high-impedance
state.
FUNCTIONAL BLOCK DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
LE
OE
O0 O1 O2 O3 O4 O5 O6 O7
3093 drw 01
PIN CONFIGURATION
FUNCTION TABLE (1)
OE 1
20
D0 2
19
D1
3 18
P20-1
D2 4 D20-1 17
D3 5 SO20-2 16
D4 6
& 15
SO20-7
D5 7
14
D6 8
13
VCC
O0
O1
O2
O3
O4
O5
O6
Inputs
DN LE
HH
LH
XX
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
Outputs
OE ON
LH
LL
HZ
3093 tbl 02
D7
GND
9 12
10 11
DIP/SOIC/SSOP
TOP VIEW
O7
LE
3093 drw 02
DEFINITION OF FUNCTIONAL TERMS
Pin Names
DN
LE
OE
Data Inputs
Description
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
ON 3-State Outputs
ON Complementary 3-State Outputs
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
3093 tbl 03
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1995
©1995 Integrated Device Technology, Inc.
8.13
DSC-4648/-
1
1 page  
IDT54/74FCT3573/3573A
3.3V CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3)
FCT3573
FCT3573A
Com'l. Mil. Com'l. Mil.
Symbol
Parameter
Conditions(1)
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay
tPHL
DN to ON
tPLH Propagation Delay
tPHL
LE to ON
CL = 50pF
RL = 500Ω
1.5 8.0 1.5 8.5 1.5 5.2 1.5 5.6 ns
2.0 13.0 2.0 15.0 2.0 8.5 2.0 9.8 ns
tPZH Output Enable Time
tPZL
1.5 12.0 1.5 13.5 1.5 6.5 1.5 7.5 ns
tPHZ Output Disable Time
tPLZ
1.5 7.5 1.5 10.0 1.5 5.5 1.5 6.5 ns
tSU Set-up Time HIGH
or LOW, DN to LE
2.0 — 2.0 — 2.0 — 2.0 — ns
tH Hold Time HIGH
or LOW, DN to LE
1.5 — 1.5 — 1.5 — 1.5 — ns
tW LE Pulse Width
6.0 — 6.0 — 5.0 — 6.0 — ns
HIGH
NOTES:
3093 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
8.13 5
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