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PDF IDT7016 Data sheet ( Hoja de datos )

Número de pieza IDT7016
Descripción HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM
Fabricantes Integrated Device Technology 
Logotipo Integrated Device Technology Logotipo



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Integrated Device Technology, Inc.
HIGH-SPEED
16K x 9 DUAL-PORT
STATIC RAM
IDT7016S/L
FEATURES:
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• High-speed access
— Military: 20/25/35ns (max.)
— Commercial:12/15/20/25/35ns (max.)
• Low-power operation
— IDT7016S
Active: 750mW (typ.)
Standby: 5mW (typ.)
— IDT7016L
Active: 750mW (typ.)
Standby: 1mW (typ.)
• IDT7016 easily expands data bus width to 18 bits or
more using the Master/Slave select when cascading
more than one device
• M/S = H for BUSY output flag on Master
M/S = L for BUSY input on Slave
FUNCTIONAL BLOCK DIAGRAM
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of semaphore signaling
between ports
• Fully asynchronous operation from either port
• Devices are capable of withstanding greater than
2001V electrostatic discharge
• TTL-compatible, single 5V (±10%) power supply
• Available in ceramic 68-pin PGA, 68-pin PLCC, and
an 80-pin TQFP
• Industrial temperature range (–40°C to +85°C) is
available, tested to military electrical specifications
DESCRIPTION:
The IDT7016 is a high-speed 16K x 9 Dual-Port Static
RAMs. The IDT7016 is designed to be used as stand-
alone Dual-Port RAM or as a combination MASTER/
SLAVE Dual-Port RAM for 18-bit-or-more wider systems.
OEL
WCEL
R/ L
OER
WCER
R/ R
I/O0L- I/O8L
BUSYL(1,2)
A13L
A0L
I/O
Control
I/O
Control
Address
Decoder
CEL
WOEL
R/ L
14
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
Address
Decoder
14
CER
WOER
R/ R
I/O0R-I/O8R
BUSYR(1,2)
A13R
A0R
SEML
(2)
INTL
M/S
NOTES:
1. In MASTER mode: BUSY is an output and is a push-pull driver
In SLAVE mode: BUSY is input.
2. BUSY outputs and INT outputs are non-tri-stated push-pull drivers.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
6.13
3190 drw 01
SEMR
(2)
INTR
OCTOBER 1996
DSC-3190/2
1

1 page




IDT7016 pdf
IDT7016S/L
HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%)
7016S
7016L
Symbol
|ILI|
|ILO|
Parameter
Input Leakage Current(1)
Output Leakage Current
Test Conditions
VCC = 5.5V, VIN = 0V to VCC
CE = VIH, VOUT = 0V to VCC
Min.
Max.
10
10
Min.
Max.
5
5
VOL Output Low Voltage
IOL = 4mA
— 0.4 — 0.4
VOH Output High Voltage
NOTE:
1. At Vcc < 2.0V, Input leakages are undefined.
IOH = -4mA
2.4 — 2.4 —
Unit
µA
µA
V
V
3190 tbl 08
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1) (VCC = 5.0V ± 10%)
Symbol
ICC
Parameter
Dynamic Operating
Current
(Both Ports Active)
ISB1 Standby Current
(Both Ports — TTL
Level Inputs)
ISB2 Standby Current
(One Port — TTL
Level Inputs)
ISB3 Full Standby Current
(Both Ports — All
CMOS Level Inputs)
ISB4 Full Standby Current
(One Port — All
CMOS Level Inputs)
Test
Condition
Version
CE = VIL, Outputs Open
SEM = VIH
f = fMAX(3)
MIL.
COM’L.
S
L
S
L
CER = CEL = VIH
SEMR = SEML = VIH
f = fMAX(3)
MIL.
COM’L.
S
L
S
L
CE CE"A"=VIL and "B" = VIH(5) MIL.
Active Port Outputs Open
f = fMAX(3)
SEMR= SEML = VIH
COM’L.
Both Ports CEL and
CER > VCC - 0.2V
MIL.
VIN > VCC - 0.2V or
COM’L.
VIN < 0.2V, f = 0(4)
SEMR = SEML > VCC - 0.2V
CE"A"< 0.2V and
MIL.
CE"B" > VCC - 0.2V(5)
SEMR = SEML > VCC - 0.2V
VIN>VCC - 0.2V or VIN<0.2V
Active Port Outputs Open,
f = fMAX(3)
COM'L.
S
L
S
L
S
L
S
L
S
L
S
L
7016X12
Com'l. Only
Typ.(2) Max.
——
——
170 325
170 275
——
——
25 70
25 60
——
——
105 200
105 170
——
——
1.0 15
0.2 5
——
——
100 180
100 150
7016X15
Com'l. Only
Typ.(2) Max.
——
——
170 310
170 260
——
——
25 60
25 50
——
——
105 190
105 160
——
——
1.0 15
0.2 5
——
——
100 170
100 140
Unit
mA
mA
mA
mA
mA
NOTES:
1. "X" in part numbers indicates power rating (S or L).
2. VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA(typ.)
3. At f = fMAX, address and I/Os are cycling at the maximum frequency read cycle of 1/tRC.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite of port "A".
3190 tbl 09
6.13 5

5 Page





IDT7016 arduino
IDT7016S/L
HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF SEMAPHORE READ AFTER WRITE TIMING, EITHER SIDE(1)
A0-A2
SEM
I/O0
R/W
VALID ADDRESS
tAW
tEW
tWR
tDW
DATAIN
VALID
tAS tWP
tDH
tSAA
VALID ADDRESS
tACE
tSOP
tOH
DATAOUT
VALID(2)
tSWRD
OE
Write Cycle
Read Cycle
NOTES:
1. CE = VIH for the duration of the above timing (both write and read cycle).
2. "DATAOUT VALID" represents all I/O's (I/O0-I/O8) equal to the semaphore value.
tAOE
3190 drw 11
TIMING WAVEFORM OF SEMAPHORE WRITE CONTENTION(1,3,4)
A0"A"-A2 "A"
SIDE(2) "A"
WR/ "A"
MATCH
SEM"A"
A0"B"-A2 "B"
SIDE(2) "B"
WR/ "B"
tSPS
MATCH
SEM"B"
3190 drw 12
NOTES:
1. DOR = DOL =VIH, CER = CEL =VIH.
2. All timing is the same for left and right ports. Port“A” may be either left or right port. “B” is the opposite port from “A”.
3. This parameter is measured from R/WA or SEM"A" going high to WR/ "B" or SEM"B" going High.
4. If tSPS is not satisfied, there is no guarantee which side will be granted the semaphore flag.
6.13 11

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