IDT7014S20PF Datasheet PDF - Integrated Device Technology
| Part Number | IDT7014S20PF | |
| Description | HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM | |
| Manufacturers | Integrated Device Technology | |
| Logo |  |
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Integrated Device Technology, Inc.
HIGH-SPEED
4K x 9 DUAL-PORT
STATIC RAM
IDT7014S
FEATURES:
• True Dual-Ported memory cells which allow simultaneous
access of the same memory location
• High-speed access
— Military: 20/25/35ns (max.)
— Commercial: 12/15/20/25ns (max.)
• Low-power operation
— IDT7014S
Active: 900mW (typ.)
• Fully asynchronous operation from either port
• TTL-compatible; single 5V (±10%) power supply
• Available in 52-pin PLCC and a 64-pin TQFP
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT7014 is an extremely high-speed 4K x 9 Dual-Port
Static RAM designed to be used in systems where on-chip
hardware port arbitration is not needed. This part lends itself
to high-speed applications which do not need on-chip arbitra-
tion to manage simultaneous access.
The IDT7014 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. See functional description.
The IDT7014 utilitizes a 9-bit wide data path to allow for
parity at the user's option. This feature is especially useful in
data communication applications where it is necessary to use
a parity bit for transmission/reception error checking.
Fabricated using IDT’s high-performance technology, the
IDT7014 Dual-Ports typically operate on only 900mW of
power at maximum access times as fast as 12ns.
The IDT7014 is packaged in a 52-pin PLCC and a 64-pin
thin plastic quad flatpack (TQFP).
FUNCTIONAL BLOCK DIAGRAM
WR/ L
OEL
I/O0L- I/O8L
A0L- A11L
WR/ R
COLUMN
CONTROL
COLUMN
CONTROL
OER
I/O0R- I/O8R
LEFT SIDE
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
RIGHT SIDE
ADDRESS
DECODE
LOGIC
A0R- A11R
2528 drw 01
The IDT logo is a registereed trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
6.11
OCTOBER 1996
DSC-2528/6
1
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IDT7014S
HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Symbol
Parameter
WRITE CYCLE
tWC Write Cycle Time
tAW Address Valid to End-of-Write
tAS Address Set-up Time
tWP Write Pulse Width
tWR Write Recovery Time
tDW Data Valid to End-of-Write
tHZ Output High-Z Time(1, 2)
tDH Data Hold Time(3)
tWZ Write Enabled to Output in High-Z(1, 2)
tOW Output Active from End-of-Write(1, 2, 3)
tWDD
tDDD
Write Pulse to Data Delay(4)
Write Data Valid to Read Data Delay(4)
7014S12
Com'l. Only
Min. Max.
12 —
10 —
0—
10 —
1—
8—
—7
0—
—7
0—
— 25
— 22
7014S15
Com'l. Only
Min. Max.
15 —
14 —
0—
12 —
1—
10 —
—7
0—
—7
0—
— 30
— 25
7014S20
Min. Max.
20 —
15 —
0—
15 —
2—
12 —
—9
0—
—9
0—
— 40
— 30
7014S25
Min. Max.
25 —
20 —
0—
20 —
2—
15 —
— 11
0—
— 11
0—
— 45
— 35
7014S35
Mil. Only
Min. Max.
35 —
30 —
0—
30 —
2—
25 —
— 15
0—
— 15
0—
— 55
— 45
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
2528 tbl 09
1. Transition is measured ±200mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary
over voltage and temperature, the actual tDH will always be smaller than the actual tOW.
4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write With Port-to-Port Read”.
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ (1,2)
ADDR"A"
WR/ "A"
DATAIN "A"
tWC
MATCH
tWP
tDW
VALID
tDH
ADDR"B"
MATCH
tWDD
DATAOUT "B"
tDDD
NOTES:
1. R/W"B" = VIH, Read cycle pass through.
2. All timing is the same for left and right ports. Port "A" may be either left or right port. Port "B" is opposite from port "A".
6.11
VALID
2528 drw 09
5
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