IDT6178S12PB Datasheet PDF - Integrated Device Technology
| Part Number | IDT6178S12PB | |
| Description | CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM | |
| Manufacturers | Integrated Device Technology | |
| Logo |  |
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IDT6178S
CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM
CMOS StaticRAM
16K (4K x 4-BIT)
Integrated Device Technology, Inc.
CACHE-TAG RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGE
IDT6178S
FEATURES:
• High-speed Address to MATCH Valid time
– Military: 12/15/20/25ns
– Commercial: 10/12/15/20/25ns (max.)
• High-speed Address Access time
– Military: 12/15/20/25ns
– Commercial: 10/12/15/20/25ns (max.)
• Low-power consumption
– IDT6178S
Active: 300mW (typ.)
• Produced with advanced CMOS high-performance
technology
• Input and output TTL-compatible
• Standard 22-pin Plastic or Ceramic DIP, 24-pin SOJ
• Military product 100% compliant to MIL-STD-883,
Class B
FUNCTIONAL BLOCK DIAGRAM
A0
ADDRESS
DECODE
A11
DESCRIPTION:
The IDT6178 is a high-speed cache address comparator
sub-system consisting of a 16,384-bit StaticRAM organized
as 4K x 4. Cycle Time and Address to MATCH Valid are equal.
The IDT6178 features an onboard 4-bit comparator that
compares RAM contents and current input data. The result is
an active HIGH on the MATCH pin. The MATCH pins of
several IDT6178s can be handed together to provide enabling
or acknowledging signals to the data cache or processor.
The IDT6178 is fabricated using IDT’s high-performance,
high-reliability CMOS technology. Address to MATCH and
Data to MATCH times are as fast as 10ns.
All inputs and outputs of the IDT6178 are TTL-compatible
and the device operates from a single 5V supply.
The IDT6178 is packaged in either a 22-pin, 300-mil Plastic
or Ceramic DIP package or 24-pin SOJ. Military grade product
is manufactured in compliance with latest revision of MIL-
STD-883, Class B, making it ideally suited to military tempera-
ture applications demanding the highest level of performance
and reliability.
16,384-BIT
MEMORY
ARRAY
VCC
GND
I/O0 – I/O3
WE
OE
CLR
4
4
CONTROL
CONTROL I/O
CLEAR
MEMORY
ARRAY
4 COMPARATOR
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1994 Integrated Device Technology, Inc.
1111..11
4
MATCH
2953 drw 01
MAY 1994
DSC-1059/2
11
|
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IDT6178S
CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
6178S10(1)
6178S12
6178S15
Symbol
Parameter
Read Cycle
tRC Read Cycle Time
tAA Address Access Time
tOE Output Enable Access Time
tOH Output Hold from Address Change
tOLZ(2) Output Enable to Output in Low-Z Time
tOHZ(2) Output Disable to Output in High-Z Time
Min. Max. Min. Max. Min. Max.
10 — 12 — 15 —
— 10 — 12 — 15
— 7 — 8 — 10
3—3—3—
2—2—2—
—6—7—9
NOTES:
1. 0°C to +70°C temperature range only.
2. This parameter guaranteed with AC load (Figure 3) by device characterization, but is not production tested.
6178S20/25
Min. Max.
Unit
20/25
—
—
3
2
—
—
20/25
15
—
—
12
ns
ns
ns
ns
ns
ns
2953 tbl 11
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
tRC
ADDRESS
tAA
OE
tOLZ (3)
tOE
DATAOUT
tOH
tOHZ (3)
DATAOUT VALID
TIMING WAVEFORM OF READ CYCLE NO. 2(1,2)
tRC
ADDRESS
tAA
tOH
DATAOUT
PREVIOUS DATAOUT VALID
NOTES:
1. WE is HIGH for Read Cycle.
2. Output enable is continuously active, OE is LOW.
3. Transition is measured ±200V from steady state.
tOH
DATAOUT VALID
2953 drw 08
DATAOUT
VALID
2953 drw 09
11.1 5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for IDT6178S12PB electronic component. |
| Information | Total 7 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ IDT6178S12PB.PDF Datasheet ] | |
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| Part Number | Description | MFRS |
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