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74F175 fiches techniques PDF

National Semiconductor - Quad D Flip-Flop

Numéro de référence 74F175
Description Quad D Flip-Flop
Fabricant National Semiconductor 
Logo National Semiconductor 





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74F175 fiche technique
November 1994
54F 74F175 Quad D Flip-Flop
General Description
The ’F175 is a high-speed quad D flip-flop The device is
useful for general flip-flop requirements where clock and
clear inputs are common The information on the D inputs is
stored during the LOW-to-HIGH clock transition Both true
and complemented outputs of each flip-flop are provided A
Master Reset input resets all flip-flops independent of the
Clock or D inputs LOW
Features
Y Edge-triggered D-type inputs
Y Buffered positive edge-triggered clock
Y Asynchronous common reset
Y True and complement output
Y Guaranteed 4000V minimum ESD protection
Commercial
74F175PC
74F175SC (Note 1)
74F175SJ (Note 1)
Military
54F175DM (Note 2)
54F175FM (Note 2)
54F175LM (Note 2)
Package
Number
N16E
J16A
M16A
M16D
W16A
E20A
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
IEEE IEC
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9490–5
TL F 9490 – 1
TL F 9490 – 2
TL F 9490 – 3
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9490
RRD-B30M75 Printed in U S A

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