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Fairchild Semiconductor - Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs

Numéro de référence 74ALVC38M
Description Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74ALVC38M fiche technique
December 2001
Revised December 2001
74ALVC38
Low Voltage Quad 2-Input NAND Gate with
Open Drain Outputs and
3.6V Tolerant Inputs and Outputs
General Description
The ALVC38 contains four 2-input NAND gates with open
drain outputs. This product is designed for low voltage
(1.4V to 3.6V) VCC applications with I/O compatibility up to
3.6V.
The ALVC38 is fabricated with advanced CMOS technol-
ogy to achieve high-speed operation while maintaining
CMOS low power dissipation.
Features
s 1.4V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.3 ns max for 3.0V to 3.6V VCC
4.2 ns max for 2.3V to 2.7V VCC
6.7 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Uses patented Quiet Seriesnoise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 250V
Ordering Code:
Order Number Package Number
Package Description
74ALVC38M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ALVC38MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
Quiet Seriesis a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation ds500719
www.fairchildsemi.com

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