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PDF 74ACTQ18823MTD Data sheet ( Hoja de datos )
| Número de pieza | 74ACTQ18823MTD | |
| Descripción | 18-Bit D-Type Flip-Flop with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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September 1991
Revised November 1999
74ACTQ18823
18-Bit D-Type Flip-Flop with 3-STATE Outputs
General Description
The ACTQ18823 contains eighteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP), Clear (CLR), Clock Enable (EN) and
Output Enable (OE) are common to each byte and can be
shorted together for full 18-bit operation.
The ACTQ18823 utilizes Fairchild’s Quiet Series technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO output control and undershoot corrector for
superior performance.
Features
s Utilizes Fairchild’s FACT Quiet Series technology
s Broadside pinout allows for easy board layout
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin output skew
s Separate control logic for each byte
s Extra data width for wider address/data paths or buses
carrying parity
s Outputs source/sink 24 mA
s Additional specs for Multiple Output Switching
s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Order Number Package Number
Package Description
74ACTQ18823SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ18823MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
CLRn
ENn
CPn
I0–I17
O0–O17
Description
Output Enable Input (Active LOW)
Clear (Active LOW)
Clock Enable (Active LOW)
Clock Pulse Input
Inputs
Outputs
FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010953
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
fMAX
Maximum Clock
Frequency
tPHL Propagation Delay
tPLH
CPn to On
tPHL Propagation Delay
CLRn to On
tPZL Output Enable Time
tPZH
tPLZ Output Disable Time
tPHZ
Note 9: Voltage Range 5.0 is 5.0V ± 0.5V.
VCC
(V)
(Note 9)
5.0
5.0
5.0
5.0
5.0
TA = +25°C
CL = 50 pF
Min Typ Max
100
2.0 9.0
2.0 9.0
2.0 9.0
2.0 9.0
2.0 9.0
1.5 7.0
1.5 8.0
TA = −40°C to +85°C
CL = 50 pF
Min Max
90
2.0 9.5
2.0 9.5
2.0 9.5
2.0 10.0
2.0 10.0
1.5 7.5
1.5 8.5
Units
MHz
ns
ns
ns
ns
AC Operating Requirements
Symbol
Parameter
tS Setup Time, HIGH or LOW,
Input to Clock
tH Hold Time, HIGH or LOW,
Input to Clock
tS Setup Time, HIGH or LOW,
Enable to Clock
tH Hold Time, HIGH or LOW,
Enable to Clock
tW CPn Pulse Width,
HIGH or LOW
tW CLRn Pulse Width,
HIGH or LOW
tREC
Recovery Time,
CLRn to CPn
Note 10: Voltage Range 5.0 is 5.0V ± 0.5V.
VCC
(V)
(Note 10)
5.0
5.0
5.0
5.0
5.0
5.0
5.0
TA = +25°C
CL = 50 pF
Typ
TA = −40°C to +85°C
CL = 50 pF
Guaranteed Minimum
3.0 3.0
1.5 1.5
3.0 3.0
1.5 1.5
Units
ns
ns
ns
ns
4.0 4.0
4.0 4.0
6.0 6.0
ns
ns
ns
5 www.fairchildsemi.com
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74ACTQ18823MTD.PDF ] | |
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