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Fairchild Semiconductor - 16-Bit Registered Transceiver with 3-STATE Outputs

Numéro de référence 74ACT16543SSC
Description 16-Bit Registered Transceiver with 3-STATE Outputs
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74ACT16543SSC fiche technique
August 1999
Revised October 1999
74ACT16543
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ACT16543 contains sixteen non-inverting transceivers
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
Features
s Independent registers for A and B buses
s Separate controls for data flow in each direction
s Back-to-back registers for storage
Multiplexed real-time and stored data transfers
s Separate control logic for each byte
s Outputs source/sink 24 mA
s TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74ACT16543SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT16543MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OEABn
OEBAn
CEABn
CEBAn
LEABn
LEBAn
A0–A15
B0–B15
Descriptions
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
FACTis a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS500301
www.fairchildsemi.com

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