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PDF EM73362 Data sheet ( Hoja de datos )
| Número de pieza | EM73362 | |
| Descripción | 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT | |
| Fabricantes | ELAN Microelectronics Corp | |
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EM73362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
GENERAL DESCRIPTION
EM73362 is an advanced single chip CMOS 4-bit micro-controller. It contains 3K-byte ROM, 52-nibble RAM,
4-bit ALU, 13-level subroutine nesting, 22-stage time base, one 12-bit timer for the kernal function and one high
speed counter. EM73362 also contains 5 interrupt sources, 1 input port, 4 bidirection ports, built-in watch-
dog-timer and LCD driver (27x3 to 15x3).
Except low-power consumption and high speed, EM73362 has the STOP mode and IDLE mode operation for
power saving function.
FEATURES
• Operation voltage
: 1.2V to 1.8V.(clock frequency : 32 K Hz)
• Clock source
: Single clock system for crystal, connect a external resistor or external clock
source, available by mask option.
• Instruction set
: 109 powerful instructions.
• Instruction cycle time : Up to 122µs for 32 K Hz.
• ROM capacity
: 3072 x 8 bits.
• RAM capacity
: 52 x 4 bits.
• Input port
: 1 port (4-bit).
• Bidirection port
: 4 ports (P4, P6, P7, P8) are available by mask option. P4 is a high current port.
(P4.0 and TONE available by mask option. P4.1~P4.3 are shared with the input/
output of RFO.) P6, P7 and P8 are shared with SEG15-SEG26.
• 12-bit timer
: One 12-bit timer is programmable for timer.
• High speed counter
: The high speed counter includes one 8-bit high speed counter, one 12-bit general
counter and a resistor frequency oscillator. It has resistor to frequency oscillation
mode, melody mode and auto load timer mode.
• Built-in time base counter: 22 stages.
• Subrountine nesting
: Up to 13 levels.
• Interrupt
: External interrupt . . . . . . 2 input interrupt sources.
Internal interrupt . . . . . . 2 timer overflow interrupts,
1 time base interrupt.
• LCD driver
: 27x3 to 15x3 dots available by mask option. 1/3, 1/2 and static three kinds of duty
(1/2 bias) selectable. The programming method of LCD driver is RAM mapping.
• Built-in watch-dog-timer is available by mask option.
• Built-in low battery detector.
• Power saving function : STOP mode and IDLE mode.
• Package type
: Chip form 49 pins.
* This specification are subject to be changed without notice.
10.8.2001 1
1 page  
EM73362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
PROGRAM EXAMPLE: Read out the ROM code of address 777h by table-look-up instruction.
LDIA #07h;
STADPL
STADPM
STADPH
:
; [DP]L ← 07h
; [DP]M ← 07h
;
[DP]
H
←
07h,
Load
DP=777h
LDL #00h;
LDH #03h;
LDAX
; ACC ← 6h
STAMI ; RAM[30] ← 6h
LDAXI ; ACC ← 5h
STAM
; RAM[31] ← 5h
;
ORG 777h
DATA 56h;
:
DATA RAM ( 52-nibble )
There is total 52 - nibble data RAM from address 00 to 33h
Data RAM includes 3 parts: zero page region, stacks and data area.
Increment
Address
00h - 0Fh Level 0 Level 1
10h - 1Fh
20h - 2Fh
Level 4
Level 8
Level 5
Level 9
30h - 33h Level 12
Level 2
Level 6
Level 10
Level 3
Level 7
Level 11
ZERO- PAGE:
Stack
Zero-page
From 00h to 0Fh is the location of zero-page. It is used as the pointer in zero-page addressing mode for the
instruction of "STD #k,y; ADD #k,y; CLR y,b; CMP k,y".
PROGRAM EXAMPLE: To wirte immediate data "07h" to address "03h" of RAM and to clear bit 2 of RAM.
STD #07h, 03h ; RAM[03] ← 07h
CLR 0Eh,2 ; RAM[0Eh]2 ← 0
STACK:
There are 13-level (maximum) stack for user using for subroutine (including interrupt and CALL). User can
assign any level be the starting stack by giving the level number to stack pointer (SP).
When user using any instruction of CALL or subroutine, before entry the subroutine, the previous PC address
will be saved into stack until return from those subroutines, the PC value will be restored by the data saved
in stack.
DATA AREA:
Except the special area used by user, the whole RAM can be used as data area for storing and loading general
data.
* This specification are subject to be changed without notice.
10.8.2001 5
5 Page 
EM73362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
PROGRAM EXAMPLE: Store immediate data #Ah into RAM of address 35h.
LDL #5h;
LDH #3h;
STDMI #0Ah; RAM[35] ← Ah
(3) For instruction : SELP, CLPL, TFPL, L register be a pointer to indicate the bit of I/O port.
When LR = 0 - 1, indicate P4.0 - P4.1.
PROGRAM EXAMPLE: To set bit 1 of Port 4 to "1"
LDL #01h;
SEPL ; P4.1 ← 1
STACK POINTER (SP)
Stack pointer is a 4-bit register which stores the present stack level number.
Before using stack, user must set the SP value first, CPU will not initiate the SP value after reset condition.
When a new subroutine is accepted, the SP will be decreased one automatically, in another word, if
returning from a subroutine, the SP will be increased one.
The data transfer between ACC and SP is by instruction of "LDASP" and "STASP".
DATA POINTER (DP)
Data pointer is a 12-bit register which stores the address of ROM can indicate the ROM code data
specified by user (refer to data ROM).
CLOCK AND TIMING GENERATOR
The clock generator is supported by a single clock system, the clock source comes from crystal (resonator)
or RC oscillation, the working frequency range is 32 KHz to 100 KHz depending on the working voltage.
CLOCK AND TIMING GENERATOR STRUCTURE
The clock generator connects outside compoments (crystal or resonator by XIN and XOUT pin for crystal
osc type, capacitor for RC osc type, these two type is decided by mask option) the clock generator
generates a basic system clock "fc".
When CPU sleeping, the clock generator will be stopped until the sleep condition released.
The system clock control generates 4 basic phase signals (S1, S2, S3, S4) and system clock.
Mask option
sleep
Mask option for choose Crystal or RC oscillation
XIN
XOUT
fc
clock generator
System clock control
System clock
S1 S2 S3 S4
* This specification are subject to be changed without notice.
10.8.2001 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM73362.PDF ] | |
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