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PDF EL5825 Data sheet ( Hoja de datos )
| Número de pieza | EL5825 | |
| Descripción | 8-Channel TFT-LCD Reference Voltage Generator | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
April 19, 2004
EL5825
FN7005.3
8-Channel TFT-LCD Reference Voltage
Generator
The EL5825 is designed to produce
the reference voltages required in
TFT-LCD applications. Each output is
programmed to the required voltage with 10 bits of
resolution. Reference pins determine the high and low
voltages of the output range, which are capable of swinging
to either supply rail. Programming of each output is
performed using the serial interface. A serial out pin enables
daisy chaining of multiple devices.
A number of the EL5825 can be stacked for applications
requiring more than 8 outputs. The reference inputs can be
tied to the rails, enabling each part to output the full voltage
range, or alternatively, they can be connected to external
resistors to split the output range and enable finer
resolutions of the outputs.
The EL5825 has 8 outputs and is available in both the 24-pin
TSSOP and the 24-pin QFN packages. It is specified for
operation over the full -40°C to +85°C temperature range.
Ordering Information
PART
NUMBER
PACKAGE TAPE & REEL
EL5825IL
24-Pin QFN
-
EL5825IL-T7
24-Pin QFN
7”
EL5825IL-T13 24-Pin QFN
13”
EL5825IR
24-Pin TSSOP
-
EL5825IR-T7 24-Pin TSSOP
7”
EL5825IR-T13 24-Pin TSSOP
13”
PKG. NO.
MDP0046
MDP0046
MDP0046
MDP0044
MDP0044
MDP0044
Features
• 8-channel reference outputs
• Accuracy of ±0.1%
• Supply voltage of 4.5V to 16.5V
• Digital supply 3.3V to 5V
• Low supply current of 8mA
• Rail-to-rail capability
Applications
• TFT-LCD drive circuits
• Reference voltage generators
Pinouts
EL5825
(24-PIN TSSOP)
TOP VIEW
EL5825
(24-PIN QFN)
TOP VIEW
1 SCLK
SDI 24
2 SDO
ENA 23
3 OSC
4 VSD
5 NC
6 VS
7 REFH
8 REFL
9 GND
10 NC
11 CAP
12 NC
OUTA 22
OUTB 21
OUTC 20
OUTD 19
GND 18
OUTE 17
OUTF 16
OUTG 15
OUTH 14
NC 13
OSC 1
VSD 2
NC 3
VS 4
REFH 5
REFL 6
GND 7
THERMAL
TherPmAaDl Pad
19 OUTB
18 OUTC
17 OUTD
16 GND
15 OUTE
14 OUTF
13 OUTG
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
1 page  
EL5825
Typical Performance Curves (Continued)
M=200µs/div
SCLK
SDA
ENA
OUTA
FIGURE 7. SMALL SIGNAL RESPONSE (FALLING FROM 200mV TO 100mV)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.176W
1.2
1
0.8
θJA =T8S5°SCO/WP24
0.6
0.4
0.2
0
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
FIGURE 8. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.9
0.8
0.7 781mW
0.6
0.5
0.4
θJA =12T8S°SCO/WP24
0.3
0.2
0.1
0
0 25 50 75 85 100
AMBIENT TEMPERATURE (°C)
125
FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
3
2.5 2.703W
2
1.5
θJA =37Q°CF/NW24
1
0.5
0
0 25 50 75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 AND SEMI G42-88 (SINGLE
LAYER) TEST BOARD
0.8
0.7
714mW
0.6
0.5
0.4
0.3
0.2
0.1
0
0 25 50 75 85 100 125
AMBIENT TEMPERATURE (°C)
150
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
5
5 Page 
QFN Package Outline Drawing
EL5825
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet EL5825.PDF ] | |
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