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PDF EL4585C Data sheet ( Hoja de datos )

Número de pieza EL4585C
Descripción Horizontal Genlock/ 8 FSC
Fabricantes Elantec Semiconductor 
Logotipo Elantec Semiconductor Logotipo



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No Preview Available ! EL4585C Hoja de datos, Descripción, Manual

EL4585C
Horizontal Genlock 8 FSC
Features
 36 MHz general purpose PLL
 8 FSC timing (Use the EL4584
for 4 FSC)
 Compatible with EL4583C Sync
Separator
 VCXO Xtal or LC tank
oscillator
 k2nS jitter (VCXO)
 User-controlled PLL capture and
lock
 Compatible with NTSC and PAL
TV formats
 8 pre-programmed popular TV
scan rate clock divisors
 Single 5V low current operation
Applications
 Pixel Clock regeneration
 Video compression engine
(MPEG) clock generator
 Video Capture or digitization
 PIP (Picture In Picture) timing
generator
 Text or Graphics overlay timing
Ordering Information
Part No Temp Range Package Outline
EL4585CN b40 C to a85 C 16-Pin DIP MDP0031
EL4585CS b40 C to a85 C 16-Lead SO MDP0027
For 3Fsc and 4Fsc clock frequency operation
see EL4584 datasheet
Demo Board
A demo PCB is available for this
product Request ‘‘EL4584 5 Demo
Board’’
General Description
The EL4585C is a PLL (Phase Lock Loop) sub system designed
for video applications but also suitable for general purpose use
up to 36 MHz In a video application this device generates a
TTL CMOS compatible Pixel Clock (Clk Out) which is a multi-
ple of the TV Horizontal scan rate and phase locked to it
The reference signal is a horizontal sync signal TTL CMOS
format which can be easily derived from an analog composite
video signal with the EL4583 Sync Separator An input signal
to ‘‘coast’’ is provided for applications where periodic distur-
bances are present in the reference video timing such as VTR
head switching The Lock detector output indicates correct lock
The divider ratio is four ratios for NTSC and four similar ratios
for the PAL video timing standards by external selection of
three control pins These four ratios have been selected for com-
mon video applications including 8 FSC 6 FSC 27 MHz (CCIR
601 format) and square picture elements used in some worksta-
tion graphics To generate 4 FSC 3 FSC 13 5 MHz (CCIR 601
format) etc use the EL4584 which does not have the addition-
al divide by 2 stage of the EL4585
For applications where these frequencies are inappropriate or
for general purpose PLL applications the internal divider can be
by passed and an external divider chain used
FREQUENCIES and DIVISORS
Function
6Fsc
CCIR 601
Square
Divisor
PAL Fosc (MHz)
1702
26 602
1728
27 0
1888
29 5
Divisor
NTSC Fosc (MHz)
1364
21 476
1716
27 0
1560
24 546
CCIR 601 divisors yield 1440 pixels in the active portion of each line for NTSC and PAL
Square pixels format gives 640 pixels for NTSC and 768 pixels for PAL
6Fsc frequencies do not yield integer divisors
Divisor does not include d 2 block
8Fsc
2270
35 468
1820
28 636
Connection Diagram
EL4585 SO P-DIP Packages
4585 – 17
Note All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication however this data sheet cannot be a ‘‘controlled document’’ Current revisions if any to these
specifications are maintained at the factory and are available upon your request We recommend checking the revision level before finalization of your design documentation
4585C
1995 Elantec Inc

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EL4585C pdf
Typical Performance Curves Contd
Idd vs Fosc
EL4585C
Horizontal Genlock 8 FSC
OSC Gain 20 MHz vs Temp
Typical Varactor
4585 – 4
OSC Gain vs Fosc
4585 – 6
Charge Pump Duty Cycle Vs iE
4585 – 7
EL4585 Block Diagram
4585 – 8
4585 – 9
4585 – 1
5

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EL4585C arduino
EL4585C
Horizontal Genlock 8 FSC
creases Ti decreases For LDET to be low at
l llock Ti k 50nS C4 is used mainly to attenuate
high frequency noise from the charge pump The
effect these components have on time to lock is
illustrated below
Lock Time
Let TeR3C3 As T increases damping increases
but so does lock time Decreasing T decreases
damping and speeds up loop response but in-
creases overshoot and thus increases the number
of hunting oscillations before lock Critical damp-
ing (ge1) occurs at minimum lock time Because
decreased damping also decreases loop stability
it is sometimes desirable to design slightly over-
damped (gl1) trading lock time for increased
stability
Typical Loop Filter
4585 – 16
LC Loop Filter Components (Approximate)
Frequency
(MHz)
R2
(kX)
R3
(kX)
C3
(mF)
C4
(mF)
26 602
100 39 0 01 0 001
27 0 100 39 0 01 0 001
29 5 100 43 0 01 0 001
35 468
100 51 0 01 0 001
21 476
100 30 0 01 0 001
24 546
100 36 0 01 0 001
28 636
100 43 0 01 0 001
Xtal Loop Filter Components (Approximate)
Frequency
(MHz)
R2
(kX)
R3
(MX)
C3
(pF)
C4
(pF)
26 602
100 4 3 68 6 8
27 0 100 4 3 68 6 8
29 5 100 4 3 68 6 8
35 468
100 4 3 68 6 8
21 476
100 4 3 68 6 8
24 546
100 4 3 68 6 8
28 636
100 4 3 68 6 8
PCB Layout Considerations
It is highly recommended that power and ground
planes be used in layout The oscillator and filter
sections constitute a feedback loop and thus care
must be taken to avoid any feedback signal influ-
encing the oscillator except at the control input
The entire oscillator filter section should be sur-
rounded by copper ground to prevent unwanted
influences from nearby signals Use separate
paths for analog and digital supplies keeping the
analog (oscillator section) as short and free from
spurious signals as possible Careful attention
must be paid to correct bypassing Keep lead
lengths short and place bypass caps as close to
the supply pins as possible If laying out a PCB
to use discrete components for the VCO section
care must be taken to avoid parasitic capacitance
at the OSC pins 3 and 5 and FILTER out (pin
7) Remove ground and power plane copper
above and below these traces to avoid making a
capacitive connection to them It is also recom-
mended to enclose the oscillator section within a
shielded cage to reduce external influences on the
VCO as they tend to be very sensitive to ‘‘hand
waving’’ influences the LC variety being more
sensitive than crystal controlled oscillators In
general the higher the operating frequency the
more important these considerations are Self
contained VCXO or VCO modules are already
mounted in a shielding cage and therefore do not
require as much consideration in layout Many
crystal manufacturers publish informative litera-
ture regarding use and layout of oscillators which
should be helpful
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