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PDF EL4583C Data sheet ( Hoja de datos )
| Número de pieza | EL4583C | |
| Descripción | Sync Separator/ 50% Slice/ S-H/ Filter/ HOUT | |
| Fabricantes | Elantec Semiconductor | |
| Logotipo |  |
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EL4583C
Sync Separator, 50% Slice, S-H, Filter, HOUT
Features
• NTSC, PAL, and SECAM sync
separation
• Single supply, +5V operation
• Precision 50% slicing
• Built-in programmable color burst
filter
• Decodes non-standard vertical
• Horizontal sync output
• Sync. pulse amplitude output
• Same socket can be used for 8-pin
EL4581C
• Low-power CMOS
• Detects loss of signal
• Resistor programmable scan rate
• Few external components
• Available in 16-pin PDIP and 16-
pin SO (0.150”) packages
Applications
• Video special effects
• Video test equipment
• Video distribution
• Multimedia
• Displays
• Imaging
• Video data capture
• Video triggers
Ordering Information
Part No
EL4583CN
EL4583CS
EL4583CS-T7
EL4583CS-T13
Package
16-Pin PDIP
16-Pin SO (0.150”)
16-Pin SO (0.150”)
16-Pin SO (0.150”)
Tape &
Reel
-
-
7”
13”
Outline #
MDP0031
MDP0027
MDP0027
MDP0027
General Description
The EL4583C extracts timing from video sync in NTSC, PAL, and
SECAM systems, and non standard formats, or from computer graph-
ics operating at higher scan rates. Timing adjustment is via an external
resistor. Input without valid vertical interval (no serration pulses) pro-
duces a default vertical output.
Outputs are: composite sync, vertical sync, filter, burst/back porch,
horizontal, no signal detect, level, and odd/even output (in interlaced
scan formats only).
The EL4583C sync slice level is set to the mid-point between sync tip
and the blanking level. This 50% point is determined by two internal
sample and hold circuits that track sync tip and back porch levels. It
provides hum and noise rejection and compensates for input levels of
0.5V to 2.0VP-P.
A built in filter attenuates the chroma signal to prevent color burst
from disturbing the 50% sync slice. Cut off frequency is set by a resis-
tor to ground from the Filter Cut Off pin. Additionally, the filter can be
by-passed and video signal fed directly to the Video Input.
The level output pin provides a signal with twice the sync amplitude
which may be used to control an external AGC function. A
TTL/CMOS compatible No Signal Detect Output flags a loss or reduc-
tion in input signal level. A resistor sets the Set Detect Level.
The EL4583C is manufactured using Elantec’s high performance ana-
log CMOS process.
Connection Diagram
FILTER CUT OFF 1
16 ANALOG GND
SET DETECT LEVEL 2
15 HORIZONTAL SYNC OUT
COMPOSITE SYNC OUT 3
14 VDD
FILTER INPUT 4
13 ODD/EVEN OUTPUT
VERTICAL SYNC OUT 5
12 RSET*
DIGITAL GND 6
11 BURST/BACK PORCH OUTPUT
FILTER OUTPUT 7
10 NO SIGNAL DETECT OUTPUT
COMPOSITE VIDEO INPUT 8
9 LEVEL OUTPUT
EL4583C
(8-Pin SO & 8-Pin PDIP)
*Note: RSET must be a 1% register
Manufactured under US Patent 5,528,303
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a “controlled document”. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
© 2001 Elantec Semiconductor, Inc.
1 page  
EL4583C
Sync Separator, 50% Slice, S-H, Filter, HOUT
Typical Performance Curves
RSET vs
Horizontal Frequency
Back Porch Clamp
On Time vs RSET
Vertical Default Delay
Time vs RSET
Filter 3dB BW vs RF
Level Out (Pin 9) vs
Sync. Tip Amplitude
Minimum Signal Detect
vs RLV
Filter Attenuation vs RF @
f = 3.58MHz
Package Power Dissipation vs Ambient Temp.
JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board
1.8
1.6 1.54W
1.4
1.2
1.136W θJA=81P°DCI/PW16
1
0.8
0.6
θJA =11S0O°C1/6W
0.4
0.2
0
0 25 50 75 85 100 125 150
Ambient Temperature (°C)
Note 1: For RLV < 1000k¾, no signal detect output (pin 10) will default high at minimum signal sensitivity specification, or at complete loss of signal.
5
5 Page 
Block Diagram
EL4583C
Sync Separator, 50% Slice, S-H, Filter, HOUT
* Note: RSET must be a 1% resistor
Figure 5. Standard (NTSC Input) H. Sync Detail
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet EL4583C.PDF ] | |
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