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PDF 5962R9671701TXC Data sheet ( Hoja de datos )

Número de pieza 5962R9671701TXC
Descripción High Reliability/ Radiation Hardened Octal Buffer/Line Driver/ Three-State/ Inverting
Fabricantes Intersil Corporation 
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Data Sheet
ACTS240T
July 1999 File Number 4610.1
High Reliability, Radiation Hardened Octal
Buffer/Line Driver, Three-State, Inverting
Intersil‘s Satellite Applications FlowTM (SAF) devices are
fully tested and guaranteed to 100kRAD total dose. These
QML Class T devices are processed to a standard flow
intended to meet the cost and shorter lead-time needs of
large volume satellite manufacturers, while maintaining a
high level of reliability.
The Intersil ACTS240T is a Radiation Hardened High
Reliability, High-Speed CMOS/SOS Octal Buffer/Line Driver
with three-state outputs having two active low enable inputs.
Each enable input controls a set of four inverting buffer/line
drivers. A HIGH on the enable input places the outputs in a
high impedance state.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACTS240T are
contained in SMD 5962-96717. A “hot-link” is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil‘s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
ORDERING
NUMBER
PART
NUMBER
TEMP.
RANGE
(oC)
5962R9671701TRC
ACTS240DTR
-55 to 125
5962R9671701TXC
ACTS240KTR
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- Latch-Up Free Under Any Conditions
- Single Event Upset (SEU) Immunity: <1 x 10-10
Errors/Bit/Day (Typ)
- SEU LET Threshold . . . . . . . . . . . . .>100 MEV-cm2/mg
• 1.25 Micron Radiation Hardened SOS CMOS
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Fast Propagation Delay . . . . . . . 17.5ns (Max), 12ns (Typ)
Pinouts
ACTS240T (SBDIP), CDIP2-T20
TOP VIEW
AEN 1
AI1 2
BO4 3
AI2 4
BO3 5
AI3 6
BO2 7
AI4 8
BO1 9
GND 10
20 VCC
19 BEN
18 AO1
17 BI4
16 AO2
15 BI3
14 AO3
13 BI2
12 AO4
11 BI1
ACTS240T (FLATPACK), CDFP4-F20
TOP VIEW
AEN
AI1
BO4
AI2
BO3
AI3
BO2
AI4
BO1
GND
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VCC
BEN
AO1
BI4
AO2
BI3
AO3
BI2
AO4
BI1
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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