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PDF BA7062F Data sheet ( Hoja de datos )

Número de pieza BA7062F
Descripción SYNC separator IC with AFC
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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No Preview Available ! BA7062F Hoja de datos, Descripción, Manual

Multimedia ICs
SYNC separator IC with AFC
BA7062F
The BA7062F separates the synchronization signals from a video signal and outputs the horizontal and vertical syn-
chronization signals (HD and VD), and the composite synchronization signal (Sync-out).
The HD and VD pulse widths are different.
Applications
TVs and VCRs
Features
1) Built-in AFC circuit.
2) Low power dissipation (approx. 21mW).
3) Low external parts count.
Absolute maximum ratings (Ta = 25°C)
4) SOP 8-pin package.
5) Horizontal free-run frequency does not require adjust-
ment.
Parameter
Symbol
Limits
Unit
Power supply voltage
VCC Max.
8.0
V
Power dissipation
Pd
350
mW
Operating temperature
Topr
– 20 ~ + 75
°C
Storage temperature
Tstg
– 55 ~ + 125
°C
When mounted on a 50mm × 50mm PCB, reduced by 3.5mW for each increase in Ta of 1°C over 25°C.
Recommended operating conditions (Ta = 25°C)
Parameter
Symbol Min. Typ. Max.
Operating power supply voltage VCC 4.5 — 5.5
Unit
V
Block diagram
1 H.OSC
2
3
4 V.SEPA
PHASE
COMP
SYNC
SEPA
8
7
6
5
1

1 page




BA7062F pdf
Multimedia ICs
Application example
C4
100p
R1
VCC = 5V
130k
1
10k
HD 2
SYNC
3
VD 4
H.OSC
V.SEPA
R2
470k
PHASE
COMP
SYNC
SEPA
BA7062F
C2
R3
10k
+ C3
8 1µ
VCC = 5V
+ C5
47µ
C6
0.022µ
7
C1
6 + 1µ
R5 470k
R4
330
5 C7
Vsig
By configuring the circuit enclosed in the dotted line to that in the
diagram on the right, you can decrease the lock-in time and increase
the capture range.
Fig. 9
R2 470k
8
C2
2200p
VCC
+
R3
10k
C3-1
0.47µ
+ C3-2
0.47µ
• When SYNC SEPA output only is used. HD and VD unused.
R1
VCC = 5V
120k
1
10k
HD 2
SYNC
3
VD 4
H.OSC
V.SEPA
PHASE
COMP
SYNC
SEPA
Fig. 10
VCC = 5V
+ C5
C6
47µ 0.022µ
8
7
C1
6 + 1µ
R5 470k
R4
330
5 C7
Vsig
(1) Connect pin 1 to GND via a 120k(approx.) resistor. Leave pins 2, 4 and 8 open.
(2) SYNC output polarity (pin 3) is positive.
(3) The delay time for rising edge of the SYNC output (pin 3) with respect to the falling edge of Sync for the Vsig
input signal (pin 6) is 850ns (reference value).
(4) The delay time for falling edge of the SYNC output (pin 3) with respect to the rising edge of Sync for the Vsig
input signal (pin 6) is 450ns (reference value).
Attached components
Resistor R1 should have a tolerance of ± 2%, and a temperature coefficient of 100ppm or lower.
5

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