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Número de pieza | BA7046 | |
Descripción | SYNC separator IC with AFC | |
Fabricantes | ROHM Semiconductor | |
Logotipo | ||
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No Preview Available ! Multimedia ICs
SYNC separator IC with AFC
BA7046 / BA7046F
The BA7046 and BA7046F separate the synchronization signals from a video signal and output the horizontal and
vertical synchronization signals (HD and VD), and the composite synchronization signal (Sync-out).
The HD and VD pulse phase difference is guaranteed.
•Applications
TVs and VCRs
•Features
1) Built-in AFC circuit.
2) HD and VD phase difference guaranteed.
3) Low power dissipation. (approx. 21mW)
•Absolute maximum ratings (Ta = 25°C)
BA7046 (DIP)
Parameter
Symbol
Limits
Power supply voltage
Power dissipation
VCC Max.
Pd
8.0
500∗
Operating temperature
Topr
– 20 ~ + 75
Storage temperature
Tstg
– 55 ~ + 125
∗ Reduced by 5mW for each increase in Ta of 1°C over 25°C.
4) Low external parts count.
5) 8-pin DIP / SOP package.
6) Horizontal free-run frequency does not require
adjustment.
Unit
V
mV
°C
°C
BA7046F (SOP)
Parameter
Symbol
Limits
Unit
Power supply voltage
Power dissipation
VCC Max.
Pd
8.0
350∗
V
mW
Operating temperature
Topr
– 20 ~ + 75
°C
Storage temperature
Tstg
– 55 ~ + 125
°C
∗ When mounted on a 50mm × 50mm PCB board, reduced by 3.5mW for each increase in Ta of 1°C
over 25°C.
•Recommended operating conditions (Ta = 25°C)
Parameter
Symbol Min. Typ. Max.
Operating power supply voltage
VCC
4.5 — 5.5
Unit
V
1
1 page Multimedia ICs
•Application example
C4
100p
R1
VCC = 5V
130k
1
10k
HD 2
SYNC
VD
3
4
R2
470k
H. OSC
V. SEPA
BA7046 / BA7046F
PHASE
COMP
SYNC
SEPA
∗
C2
8
R3
10k
+ C3
1µ
VCC = 5V
+ C5
47µ
C6
0.022µ
7
C1 R4
6
+ 1µ
330
R5 470k
5 C7
Vsig
∗ By configuring the circuit enclosed in the dotted line to that in the
diagram on the right, you can decrease the lock-in time and increase the
capture range.
Fig.9
R2
470k
8
C2
2200p
VCC
R3
10k
C3-1
0.47µ
C3-2
0.47µ
• When SYNC SEPA output only is used. HD and VD unused.
R1
VCC = 5V
120k
1
10k
HD 2
SYNC
3
VD 4
H. OSC
V. SEPA
PHASE
COMP
SYNC
SEPA
VCC = 5V
+ C5
C6
47µ 0.022µ
8
7
C1
6 + 1µ
R5 470k
R4
330
5 C7
Vsig
Fig. 10
(1) Connect pin 1 to GND via a 120kΩ (approx.) resistor. Leave pins 2, 4 and 8 open.
(2) SYNC output polarity (pin 3) is positive.
(3) The delay time for rising edge of the SYNC output (pin 3) with respect to the falling edge of Sync for the Vsig
input signal (pin 6) is 850ns (reference value).
(4) The delay time for falling edge of the SYNC output (pin 3) with respect to the rising edge of Sync for the Vsig
input signal (pin 6) is 450ns (reference value).
•Attached components
Resistor R1 should have a tolerance of ± 2%, and a temperature coefficient of 100ppm or lower.
5
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet BA7046.PDF ] |
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