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DM7403N fiches techniques PDF

National Semiconductor - Quad 2-Input NAND Gates with Open-Collector Outputs

Numéro de référence DM7403N
Description Quad 2-Input NAND Gates with Open-Collector Outputs
Fabricant National Semiconductor 
Logo National Semiconductor 





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DM7403N fiche technique
June 1989
DM5403 DM7403 Quad 2-Input NAND Gates
with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function The open-collector out-
puts require external pull-up resistors for proper logical op-
eration
Pull-Up Resistor Equations
RMAX
e
VCC (Min) b VOH
N1 (IOH) a N2 (IIH)
RMIN
e
VCC (Max) b VOL
IOL b N3 (IIL)
Where N1 (IOH) e total maximum output high current for all
outputs tied to pull-up resistor
N2 (IIH) e total maximum input high current for all
inputs tied to pull-up resistor
N3 (IIL) e total maximum input low current for all
inputs tied to pull-up resistor
Connection Diagram
Dual-In-Line Package
Function Table
Order Number DM5403J or DM7403N
See NS Package Number J14A or N14A
Y e AB
Inputs
Output
AB
Y
LL
LH
HL
HH
H
H
H
L
H e High Logic Level
L e Low Logic Level
TL F 6493 – 1
C1995 National Semiconductor Corporation TL F 6493
RRD-B30M105 Printed in U S A

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