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TEMIC Semiconductors - 128-Bit IDIC for Radio Frequency Identification

Numéro de référence E5530H-ZZZ-S8
Description 128-Bit IDIC for Radio Frequency Identification
Fabricant TEMIC Semiconductors 
Logo TEMIC Semiconductors 





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E5530H-ZZZ-S8 fiche technique
e5530
128-Bit IDIC® for Radio Frequency Identification
Description
The e5530 is part of a closed coupled identification
system. It receives power from an RF transmitter which
is coupled inductively to the IDIC®. The frequency is
typically 100 to 450 kHz. Receiving RF, the IDIC®
responds with a data stream by damping the incoming RF
Features
D Low power, low voltage CMOS
D Rectifier, voltage limiter, clock extraction
on-chip (no battery)
D Small size
D Factory laser programmable ROM
D Operating temperature range –40 to +125°C
D Radio Frequency (RF): 100 to 450 kHz
D Transmission options
Code length: 128, 96, 64, 32 bits
via an internal load. This damping-in-turn can be detected
by the interrogator. The identifying data are stored in a
128 bit PROM on the e5530, realized as an array of laser-
programmable fuses. The logic block diagram for the
e5530 is shown in figure 2. The data are output bit-
serially as a code of length 128, 96, 64 or 32 bits. The
chips are factory-programmed with a unique code.
Bitrate [bit/s]:
Modulation:
Application
RF/8,RF/16, RF/32, RF/40,
RF/50, RF/64, RF/80, RF/100,
RF/128, RF/256
FSK, PSK, BIPH, Manchester
BIPH-FSK
RF transmitter
and
interrogator
RF
Figure 1. Application
IDIC®
e5530
95 10318
Analog front end
Mod
Load
Coil
Modulator
FSK
PSK
BIPH
Manchester
Clock
extractor
Clk
Data
R7
R6
R5
R4
R3
R2
R1
R0
95 10155
128 bit PROM
Coil
Rectifier
VDD VSS
Bitrate
Figure 2. Block diagram
IDIC® stands for IDentification Integrated Circuit and is a trademark of TEMIC.
Rev. A3, 17-Sep-98
Column decoder
Counter
1 (5)

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