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PDF FQS4410 Data sheet ( Hoja de datos )

Número de pieza FQS4410
Descripción Single N-Channel/ Logic Level/ Power MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FQS4410 Hoja de datos, Descripción, Manual

FQS4410
Single N-Channel, Logic Level, Power MOSFET
May 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as DC/DC
converters, high efficiency switching for power
management in portable and battery operated products.
Features
• 10A, 30V, RDS(on) = 0.0135@VGS = 10 V
• Low gate charge ( typical 21 nC)
• Low Crss ( typical 145 pF)
• Fast switching
• Improved dv/dt capability
• 175°C maximum junction temperature rating
84
73
62
51
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
dv/dt
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 70°C)
Drain Current - Pulsed
Gate-Source Voltage
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
Linear Derating Factor
Operating and Storage Temperature Range
(Note 1)
(Note 3)
Thermal Characteristics
Symbol
RθJA
Parameter
Thermal Resistance, Junction-to-Ambient
FQS4410
30
10
8
50
± 20
7.0
2.5
0.02
-55 to +175
Typ Max
-- 50
Units
V
A
A
A
V
V/ns
W
W/°C
°C
Units
°C/W
©2000 Fairchild Semiconductor International
Rev. A, May 2000

1 page




FQS4410 pdf
Gate Charge Test Circuit & Waveform
50KΩ
Same Type
as DUT
12V 200nF
300nF
VGS
5V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
5V
10V
VDS
RG
RL
VDD
( 0.5 rated VDS )
DUT
VDS
90%
Vin 10%
td(on)
tr
t on
td(off)
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
VDD
DUT
EAS =
--1--
2
LL IAS2
BVDSS
--------------------
BVDSS -- VDD
BVDSS
IAS
ID (t)
VDD
VDS (t)
t p Time
©2000 Fairchild Semiconductor International
Rev. A, May 2000

5 Page










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