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Número de pieza | FQG4902 | |
Descripción | 250V Dual N & P-Channel MOSFET | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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No Preview Available ! FQG4902
250V Dual N & P-Channel MOSFET
QFET TM
General Description
These dual N and P-channel enhancement mode power
field effect transistors are produced using Fairchild’s
proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on half bridge.
Features
• N-Channel 0.54A, 250V, RDS(on) = 2.0 Ω @ VGS = 10 V
P-Channel -0.54A, -250V, RDS(on) = 2.0 Ω @ VGS = -10 V
• Low gate charge ( typical N-Channel 6.0 nC)
( typical P-Channel 12.0 nC)
• Fast switching
• Improved dv/dt capability
D2
D2
D1
D1
G2
S2
G1
S1
8-DIP Pin #1
5
6
7
8
4
3
2
1
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
dv/dt
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TA = 25°C)
- Continuous (TA = 100°C)
Drain Curent - Pulsed
Gate-Source Voltage
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
(Note 1)
(Note 2)
N-Channel
P-Channel
250 -250
0.54 -0.54
0.34 -0.34
4.32 -4.32
± 30
5.5 -5.5
1.4
0.011
-55 to +150
Thermal Characteristics
Symbol
RθJA
Parameter
Thermal Resistance, Junction-to-Ambient
(Note 5a)
Typ
--
Max
90
Units
V
A
A
A
V
V/ns
W
W/°C
°C
Units
°C/W
©2002 Fairchild Semiconductor Corporation
Rev. A1, April 2002
1 page Typical Characteristics : N-Channel (Continued)
1.2
1.1
1.0
0.9 ※Notes:
1.
2.
VGS
ID =
=0V
250 μ
A
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
is Limited by R DS(on)
101
100 μ s
100 1 ms
10 ms
100 ms
1s
10-1
DC
10-2
10-3
100
※ Notes :
1. TA = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5 ※ Notes :
1. VGS = 10 V
2. ID = 0.27 A
0.0
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
0.6
0.4
0.2
0.0
25 50 75 100 125 150
T , Ambient Temperature [℃]
A
Figure 10. Maximum Drain Current
vs. Ambient Temperature
102
D =0.5
0 .2
101 0.1
0 .0 5
0 .0 2
100 0.01
1 0 -1
1 0 -5
1 0 -4
sin g le p u ls e
PDM
t1
t2
※ N otes :
1 . Z θ JA(t) = 9 0 ℃ /W M a x.
2 . D u ty F ac to r, D = t1/t2
3 . T JM - T A = P DM * Z θ JA(t)
1 0 -3
1 0 -2
1 0 -1
100
101
t1, S q u a re W a v e P u ls e D u ra tio n [se c]
102
103
Figure 11. Transient Thermal Response Curve
©2002 Fairchild Semiconductor Corporation
Rev. A1, April 2002
5 Page Package Dimensions
8-DIP
6.40 ±0.20
0.252 ±0.008
#1 #8
#4 #5
7.62
0.300
5.08
0.200
MAX
3.40 ±0.20
0.134 ±0.008
3.30 ±0.30
0.130 ±0.012
0.33
0.013
MIN
0~15°
0.25
+0.10
–0.05
0.010
+0.004
–0.002
©2002 Fairchild Semiconductor Corporation
Dimensions in Millimeters
Rev. A1, April 2002
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet FQG4902.PDF ] |
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