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Filtronic Compound Semiconductors - HIGH PERFORMANCE PHEMT WITH SOURCE VIAS

Numéro de référence FPDA200V
Description HIGH PERFORMANCE PHEMT WITH SOURCE VIAS
Fabricant Filtronic Compound Semiconductors 
Logo Filtronic Compound Semiconductors 





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FPDA200V fiche technique
Preliminary Data Sheet
FPDA200V
HIGH PERFORMANCE PHEMT WITH SOURCE VIAS
FEATURES
21 dBm Output Power at 1-dB
Compression at 18 GHz
12.5 dB Power Gain at 18 GHz
55% Power-Added Efficiency
Source Vias to Backside Metallization
GATE
BOND
PAD
DRAIN
BOND
PAD
DIE SIZE: 15.6X13.2 mils (395x335 µm)
DIE THICKNESS: 3.9 mils (100 µm)
BONDING PADS: 3.1X3.1 mils (80x80 µm)
DESCRIPTION AND APPLICATIONS
The FPDA200V is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25 µm by 200 µm Schottky barrier gate. The recessed “mushroom” gate structure minimizes
parasitic gate-source and gate resistances. The epitaxial structure and processing have been
optimized for high dynamic range.
Typical applications include high dynamic range driver stages for commercial applications including
wireless infrastructure systems, broad bandwidth amplifiers, and optical systems.
Source vias have been added for improved performance and assembly convenience. Each via hole
has 0.02 nH of inductance. Additionally, the via holes remove the need for source bond wires,
meaning only two bond wires are required for assembly. Because the via connects the source pad to
the backside metallization, self-bias configurations should be designed with caution.
ELECTRICAL SPECIFICATIONS @ TAmbient = 25°C
Parameter
Saturated Drain-Source Current
Power at 1-dB Compression
Power Gain at 1-dB Compression
Power-Added Efficiency
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Gate-Source Breakdown
Voltage Magnitude
Gate-Drain Breakdown
Voltage Magnitude
Thermal Resistivity
frequency=18 GHz
Symbol
IDSS
P-1dB
G-1dB
PAE
IMAX
GM
IGSO
VP
|VBDGS|
|VBDGD|
ΘJC
Test Conditions
VDS = 2 V; VGS = 0 V
VDS = 5 V; IDS = 50% IDSS
VDS = 5 V; IDS = 50% IDSS
VDS = 5 V; IDS = 50% IDSS
VDS = 2 V; VGS = 1 V
VDS = 2 V; VGS = 0 V
VGS = -5 V
VDS = 2 V; IDS = 1 mA
IGS = 1 mA
IGD = 1 mA
Phone: (408) 988-1845
Fax: (408) 970-9950
http:// www.filss.com
Min Typ Max Units
40 60 85 mA
19 21
dBm
11 12.5
dB
55 %
125 mA
50 70
mS
1 10 µA
-0.25 -0.8 -1.5 V
67
V
89
V
260 °C/W
Revised: 2/25/02

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