M27V402-120N1TR Datasheet PDF - STMicroelectronics
| Part Number | M27V402-120N1TR | |
| Description | 4 Mbit 256Kb x 16 Low Voltage UV EPROM and OTP EPROM | |
| Manufacturers | STMicroelectronics | |
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M27V402
4 Mbit (256Kb x 16) Low Voltage UV EPROM and OTP EPROM
s LOW VOLTAGE READ OPERATION:
3V to 3.6V
s FAST ACCESS TIME: 120ns
s LOW POWER CONSUMPTION:
– Active Current 15mA at 5MHz
– Standby Current 20µA
s PROGRAMMING VOLTAGE: 12.75V ± 0.25V
s PROGRAMMING TIME: 100µs/byte (typical)
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 8Dh
DESCRIPTION
The M27V402 is a low voltage, low power 4 Mbit
UV erasable and electrically programmable
EPROM, ideally suited for handheld and portable
microprocessor systems requiring large programs.
It is organized as 262,144 by 16 bits.
The M27V402 operates in the read mode with a
supply voltage as low as 3V. The decrease in op-
erating power allows either a reduction of the size
of the battery or an increase in the time between
battery recharges.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
40
1
FDIP40W (F)
40
1
PDIP40 (B)
PLCC44 (K)
Figure 1. Logic Diagram
TSOP40 (N)
10 x 20 mm
VCC VPP
18
A0-A17
16
Q0-Q15
Table 1. Signal Names
A0-A17
Address Inputs
Q0-Q15
Data Outputs
E Chip Enable
G Output Enable
VPP Program Supply
VCC Supply Voltage
VSS Ground
E M27V402
G
VSS
AI01819
May 1998
1/15
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M27V402
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70°C, –20 to 70°C, –20 to 85°C or –40 to 85°C; VCC = 3.3V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
Min Max
ILI Input Leakage Current
ILO Output Leakage Current
ICC Supply Current
ICC1 Supply Current (Standby) TTL
0V ≤ VIN ≤ VCC
0V ≤ VOUT ≤ VCC
E = VIL, G = VIL, IOUT = 0mA,
f = 5MHz, VCC = 3.6V
E = VIH
±10
±10
20
1
ICC2 Supply Current (Standby) CMOS
IPP Program Current
VIL Input Low Voltage
E > VCC – 0.2V, VCC = 3.6V
VPP = VCC
–0.3
20
10
0.8
VIH (2) Input High Voltage
2 VCC + 1
VOL Output Low Voltage
IOL = 2.1mA
Output High Voltage TTL
VOH
Output High Voltage CMOS
IOH = –400µA
IOH = –100µA
2.4
VCC–0.7V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
0.4
Unit
µA
µA
mA
mA
µA
µA
V
V
V
V
V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
output capacitive and inductive loading of the de-
vice.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27V402 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed, both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’ is by die exposure to ultraviolet
light (UV EPROM). The M27V402 is in the pro-
gramming mode when VPP input is at 12.75V, G ia
at VIH and E is pulsed to VIL. The data to be pro-
grammed is applied to 16 bits in parallel to the data
output pins.
The levels required for the address and data in-
puts are TTL. VCC is specified to be 6.25V ±
0.25V.
5/15
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