DS26LV32 Datasheet PDF - National Semiconductor
| Part Number | DS26LV32 | |
| Description | 3V Enhanced CMOS Quad Differential Line Receiver | |
| Manufacturers | National Semiconductor | |
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April 1999
DS26LV32AT
3V Enhanced CMOS Quad Differential Line Receiver
General Description
The DS26LV32A is a high speed quad differential CMOS re-
ceiver that meets the requirements of both TIA/EIA-422-B
and ITU-T V.11. The CMOS DS26LV32AT features typical
low static ICC of 9 mA which makes it ideal for battery pow-
ered and power conscious applications. The TRI-STATE®
enables, EN and EN*, allow the device to be active High or
active Low. The enables are common to all four receivers.
The receiver output (RO) is guaranteed to be High when the
inputs are left open. The receiver can detect signals as low
as ±200 mV over the common mode range of ±10V. The re-
ceiver outputs (RO) are compatible with TTL and LVCMOS
levels.
Features
n Low Power CMOS design (30 mW typical)
n Interoperable with existing 5V RS-422 networks
n Industrial and Military Temperature Range
n Conforms to TIA/EIA-422-B (RS-422) and ITU-T V.11
Recommendation
n 3.3V Operation
n ±7V Common Mode Range @ VID = 3V
n ±10V Common Mode Range @ VID = 0.2V
n Receiver OPEN input failsafe feature
n Guaranteed AC Parameter:
Maximum Receiver Skew: 4 ns
Maximum Transition Time: 10 ns
n Pin compatible with DS26C32AT
n 32 MHz Toggle Frequency
n > 6.5k ESD Tolerance (HBM)
n Available in SOIC and Cerpack Packaging
n Standard Microcircuit Drawing (SMD) 5962-98585
Connection Diagram
Dual-In-Line Package
Truth Table
Enables
EN EN*
LH
All Other
Combinations of
Enable Inputs
† Open, not terminated
L = Logic Low
H = Logic High
X = Irrelevant
Z = TRI-STATE
Inputs
RI+–RI−
X
VID ≥ +0.2V
VID ≤ −0.2V
Open†
Output
RO
Z
H
L
H
DS012908-1
Top View
Order Number DS26LV32ATM or DS26LV32AW
See NS Package Number M16A or W16A
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS012908
www.national.com
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Parameter Measurement Information (Continued)
DS012908-3
Note 10: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, ZO = 50Ω, tr ≤ 10 ns, tf ≤ 10 ns.
Note 11: CL includes probe and jig capacitance.
Note 12: For military grade product, tr ≤ 6ns and tf ≤ 6ns.
Note 13: For military grade product the measure point is 1/2 VCC for tPLH, tPHL, tPZL, and tPZH
FIGURE 2. Receiver Propagation Delay and Transition Time Waveform (Notes 10, 11, 12, 13)
FIGURE 3. Receiver TRI-STATE Test Circuit
DS012908-4
DS012908-5
FIGURE 4. Receiver TRI-STATE Output Enable and Disable Waveforms (Notes 10, 11, 12, 13)
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for DS26LV32 electronic component. |
| Information | Total 10 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ DS26LV32.PDF Datasheet ] | |
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