PDF DS2482-100 Data sheet ( Hoja de datos )

Número de pieza	DS2482-100
Descripción	Single-Channel 1-Wire Master
Fabricantes	Dallas Semiconducotr
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No Preview Available ! DS2482-100 Single-Channel 1-Wire Master www.maxim-ic.com GENERAL DESCRIPTION The DS2482-100 is an I²Cä to 1-WireÒ bridge device that interfaces directly to standard (100kHz max) or fast (400kHz max) I²C masters to perform bi- directional protocol conversion between the I²C master and any downstream 1-Wire slave devices. Relative to any attached 1-Wire slave device, the DS2482-100 is a 1-Wire master. Internal factory trimmed timers relieve the system host processor from generating time-critical 1-Wire waveforms, supporting both standard and Overdrive 1-Wire communication speeds. To optimize 1-Wire waveform generation, the DS2482-100 performs slew rate control on rising and falling 1-Wire edges and provides additional programmable features to match drive characteristics to the 1-Wire slave environment. Programmable strong pullup features support 1-Wire power delivery to 1-Wire devices such as EEPROMs and sensors. The DS2482-100 combines these features with an output to control an external MOSFET for enhanced strong pullup application. The I²C slave address assignment is controlled by two binary address inputs, resolving potential conflicts with other I²C slave devices in the system. APPLICATIONS § Printers § Medical Instruments § Industrial Sensors § Cell Phones, PDAs TYPICAL OPERATING CIRCUIT VCC (I²C port) µC RP SDA SCL PCTLZ DS2482-100 AD0 AD1 IO Rt Current Limiting Resistor Optional circuitry 1-Wire line 1-Wire Device 1-Wire Device 1-Wire Device FEATURES § I²C Host Interface, Supports 100kHz and 400kHz I²C Communication Speeds § 1-Wire Master IO with Selectable Active or Passive 1-Wire Pullup § Provides Reset/Presence, 8-Bit, Single-Bit, and Three-Bit 1-Wire IO Sequences § Standard and Overdrive 1-Wire Communication Speeds § Slew Controlled 1-Wire Edges § Selectable 1-Wire Slave Presence-Pulse Falling Edge Masking to Control Fast Edges on the 1-Wire Line § Supports Low-Impedance 1-Wire Strong Pullup for EEPROMs, Temp Sensors, or Other 1-Wire Slaves that have Momentary High Current Modes § 2 Address Inputs for I²C Address Assignment § Wide Operating Range: 2.9V to 5.5V, -40°C to +85°C § 8-Pin, 150-mil SO Package ORDERING INFORMATION PART TEMP RANGE PIN-PACKAGE DS2482S-100 -40 to +85°C 8 SO (150 mil) DS2482S-100/T&R -40 to +85°C 8 SO (150 mil) PIN CONFIGURATION VCC IO GND SCL 1 2 3 4 8 7 6 5 AD0 AD1 PCTLZ SDA I2C is a trademark of Philips Corp. Purchase of I2C components of Maxim Integrated Products, Inc., or one of its Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. 1-Wire is a Registered Trademark of Dallas Semiconductor. Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. 1 of 21 REV: 110204 1 page Figure 1. Block Diagram DS2482-100 Config Register DS2482-100: Single-Channel 1-Wire Master T-Time OSC SDA SCL AD0 AD1 I²C Interface Controller I/O Controller Status Register Read Data Register Line XCVR IO PCTLZ DETAILED DESCRIPTION The DS2482-100 is a self-timed 1-Wire master, which supports advanced 1-Wire waveform features including standard and Overdrive speeds, active pullup, strong pullup for power delivery, and presence-pulse masking. Once supplied with command and data, the I/O controller of the DS2482 performs time-critical 1-Wire communication functions such as reset/presence detect cycle, read-byte, write-byte, single-bit R/W and triplet for ROM Search, without requiring interaction with the host processor. The host obtains feedback (completion of a 1-Wire function, presence pulse, 1-Wire short, search direction taken) through the Status register and data through the Read Data register. The DS2482 communicates with a host processor through its I²C bus interface in standard mode or in fast mode. The logic state of two address pins determines the I²C slave address of the DS2482, allowing up to four devices operating on the same bus segment without requiring a hub. DEVICE REGISTERS The DS2482 has three registers that the I²C host can read: Configuration, Status, and Read Data. These registers are addressed by a read pointer. The position of the read pointer, i.e., the register that the host reads in a subsequent read access, is defined by the instruction that the has DS2482 executed last. The host has read and write access to the Configuration register to enable certain 1-Wire features. Configuration Register The DS2482 supports allows four 1-Wire features that are enabled or selected through the Configuration register. These features are: § Active Pullup (APU) § Presence Pulse Masking (PPM) § Strong Pullup (SPU) § 1-Wire Speed (1WS) These features can be selected in any combination. While APU, PPM, and 1WS maintain their state, SPU returns to its inactive state as soon as the strong pullup has ended. Configuration Register Bit Assignment bit 7 1WS bit 6 SPU bit 5 PPM bit 4 APU bit 3 1WS bit 2 SPU bit 1 PPM bit 0 APU After a device reset (power-up cycle or initiated by the Device Reset command) the Configuration register reads 00h. When writing to the Configuration register, the new data is accepted only if the upper nibble (bits 7 to 4) is the one's complement of the lower nibble (bits 3 to 0). When read, the upper nibble is always 0h. 5 of 21 5 Page DS2482-100: Single-Channel 1-Wire Master Figure 5. 1-Wire Reset/Presence Detect Cycle RESET PULSE PRESENCE/SHORT DETECT VCC tSI tMSP VIH1 VIL1 0V tF1 tRSTL tRSTH Pull-up DS2482 pull-down 1-W Slave pull down For presence pulse masking and pull-up details see Figure 3. 1-Wire Single Bit Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration 1-Wire Activity Read Pointer Position Status Bits Affected Configuration Bits Affected 87h Bit Byte Generates a single 1-Wire time slot with a bit value ‘V’ as specified by the bit byte at the 1-Wire line. A ‘V’ value of 0b generates a write-zero time slot (Figure 6), a value of 1b generates a write-one slot, which also functions as a read-data time slot (Figure 7). In either case the logic level at the 1-Wire line is tested at tMSR and SBR is updated. To perform single bit writes or reads at the 1-Wire line when single bit communication is necessary (the exception). 1-Wire activity must have ended before the DS2482 can process this command. Command code and bit byte are not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored. tSLOT + maximum 262.5ns, counted from the falling SCL edge of the first bit (MS bit) of the bit byte. Begins maximum 262.5ns after the falling SCL edge of the MS bit of the bit byte. Status register (for busy polling and data reading) 1WB (set to 1 for tSLOT) SBR is updated at tMSR DIR (may change its state) 1WS, APU, SPU apply Bit Allocation in the Bit Byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Vx x xxxxx x = don’t care 11 of 21 11 Page

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