PDF DS2417 Data sheet ( Hoja de datos )

Número de pieza	DS2417
Descripción	1-Wire Time Chip With Interrupt
Fabricantes	Dallas Semiconducotr
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No Preview Available ! www.dalsemi.com PRELIMINARY DS2417 1-WireTM Time Chip With Interrupt FEATURES PIN ASSIGNMENT § Real-Time Clock with fully compatible 1-Wire MicroLAN interface § Uses the same binary time/date representation as the DS2404 but with 1 second resolution § Clock accuracy ±2 minutes per month at 25°C § Programmable interrupt output for system 6-PIN TSOC PACKAGE 16 25 34 TOP VIEW wakeup § Communicates at 16.3k bits per second § Unique, factory-lasered and tested 64-bit reg- SIDE VIEW istration number (8-bit family code + 48-bit serial number + 8-bit CRC tester) assures ab- solute traceability because no two parts are See Mech. Drawings Section alike § 8-bit family code specifies device communi- cation requirements to bus master § Built-in multidrop controller ensures com- patibility with other MicroLAN products § Operates over a wide VDD voltage range of 2.5V to 5.5V from -40°C to +85°C § Low power, 200 nA typically with oscillator PIN DESCRIPTION Pin 1 GND Pin 2 1-Wire Pin 3 INT Pin 4 Pin 5 VDD X1 Pin 6 X2 running § Compact, low cost 6-pin TSOC surface mount package ORDERING INFORMATION DS2417P 6-pin TSOC package DS2417V Tape & Reel of DS2417P DS2417X Chip Scale Pkg., Tape & Reel DESCRIPTION The DS2417 1-Wire Time Chip with Interrupt offers a simple solution for storing and retrieving vital time information with minimal hardware. The DS2417 contains a unique lasered ROM and a real-time clock/calendar implemented as a binary counter. Only one pin is required for communication with the device. Utilizing a backup energy source, the data is nonvolatile and allows for stand-alone operation. The DS2417 features can be used to add functions such as calendar, time and date stamp, and logbook to any type of electronic device or embedded application that uses a microcontroller. OVERVIEW The DS2417 has two main data components: 1) 64-bit lasered ROM, and 2) real-time clock counter (Figure 1). The real-time clock utilizes an on-chip oscillator that is connected to an external 32.768 kHz crystal. The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM. The protocol for these ROM functions is described in Figure 7. After a ROM function command 1 of 15 062299 1 page DS2417 REAL-TIME CLOCK The real-time clock is a 32-bit binary counter. It is incremented once per second. The real-time clock can accumulate 136 years of seconds before rolling over. Time/date is represented by the number of seconds since a reference point, which is determined by the user. For example, 12:00 a.m., January 1, 1970 could be a reference point. CLOCK FUNCTION COMMANDS The “Clock Function Flow Chart” (Figure 5) describes the protocols necessary for accessing the real-time clock. With only four bytes of real-time clock and one control byte the DS2417 does not provide random access. Reading and writing always starts with the device control byte followed by the least significant byte of the time data. READ CLOCK [66h] The read clock command is used to read the device control byte and the contents of the real-time clock counter. After having received the most significant bit of the command code the device copies the actual contents of the real-time clock counter to the read/write buffer. Now the bus master reads data beginning with the device control byte followed by the least significant byte through the most significant byte of the real-time clock. After this the bus master may continue reading from the DS2417. The data received will be the same as in the first pass through the command flow. The read clock command can be ended at any point by issuing a Reset Pulse. WRITE CLOCK [99h] The write clock command is used to set the real-time clock counter and to write the device control byte. After issuing the command, the bus master writes first the device control byte, which becomes immedi- ately effective. After this the bus master sends the least significant byte through the most significant byte to be written to the real-time clock counter. The new time data is copied from the read/write buffer to the real-time clock counter and becomes effective as the bus master generates a reset pulse. If enabled, an interrupt pulse will be generated either immediately or delayed, depending on the actual time and the se- lected interval duration (see Figure 11). If the oscillator is intentionally stopped the real-time clock coun- ter behaves as a four-byte non-volatile memory. 5 of 15 5 Page READ/WRITE TIMING DIAGRAM Figure 9 Write-one Time Slot VPULLUP VPULLUP MIN VIH MIN VIL MAX 0V tSLOT DS2417 Sampling Window tLOW1 15µs (OD: 2µs) (OD: 6µs) 60µs RESISTOR MASTER Write-zero Time Slot VPULLUP VPULLUP MIN VIH MIN VIL MAX 0V RESISTOR MASTER 60 µs ≤tSLOT < 120 µs 1 µs ≤tLOW1 < 15 µs 1 µs ≤tREC < ∞ tSLOT DS2417 Sampling Window 15µs (OD: 2µs) (OD: 6µs) 60µs t LOW0 60 µs ≤tLOW0 < tSLOT < 120 µs 1 µs ≤tREC < ∞ tREC tREC DS2417 11 of 15 11 Page

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