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PDF FDZ7064N Data sheet ( Hoja de datos )

Número de pieza FDZ7064N
Descripción 30V N-Channel Logic Level PowerTrench BGA MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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January 2003
FDZ7064N
30V N-Channel Logic Level PowerTrenchBGA MOSFET
General Description
Features
Combining Fairchild’s 30V PowerTrench process with
state of the art BGA packaging, the FDZ7064N
minimizes both PCB space and RDS(ON). This BGA
MOSFET embodies a breakthrough in packaging
technology which enables the device to combine
excellent thermal transfer characteristics, high current
handling capability, ultra-low profile packaging, low gate
charge, and low RDS(ON).
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications resulting in DC/DC power supply
designs with higher overall efficiency.
Applications
13.5 A, 30 V. RDS(ON) = 8.0 m@ VGS = 4.5 V
RDS(ON) = 7.0 m@ VGS = 10 V
Occupies only 14 mm2 of PCB area. Only 42% of
the area of SO-8
Ultra-thin package: less than 0.80 mm height when
mounted to PCB
3.5 x 4 mm2 Footprint
High power and current handling capability.
DC/DC converters
Solenoid drive
Pin 1
D DDD DD
D SS S SD
D SS S SD
D SS S SD
DGSS SD
Bottom
Pin 1
Top
D
G
S
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, Tstg
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
(Note 1a)
– Pulsed
Power Dissipation (Steady State)
(Note 1a)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJB Thermal Resistance, Junction-to-Ball
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
7064N
FDZ7064N
13”
Ratings
30
±12
13.5
60
2.2
–55 to +150
56
4.5
0.6
Tape width
12mm
Units
V
V
A
W
°C
°C/W
Quantity
3000
2003 Fairchild Semiconductor Corporation
FDZ7064N Rev. D2 (W)

1 page




FDZ7064N pdf
Typical Characteristics
10
ID = 13.5A
8
6
4
VDS = 10V
20V
15V
2
0
0 10 20 30 40 50 60 70
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
1000
100
RDS(ON) LIMIT
10
1
VGS = 10V
SINGLE PULSE
0.1 RθJA = 119oC/W
TA = 25oC
100us
1ms
10ms
100ms
1s
10s
DC
0.01
0.01
0.1 1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
5000
4000
3000
2000
1000
0
0
CISS
f = 1MHz
VGS = 0 V
COSS
CRSS
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
40
30
20
10
0
0.01
0.1
SINGLE PULSE
RθJA = 119°C/W
TA = 25°C
1 10
t1, TIME (sec)
100 1000
Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
RθJA(t) = r(t) * RθJA
RθJA = 119 °C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.001
0.001
0.01
0.1 1 10
t1, TIME (sec)
100 1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDZ7064N Rev. D2(W)

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