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PDF FDS6982S Data sheet ( Hoja de datos )

Número de pieza FDS6982S
Descripción Dual Notebook Power Supply N-Channel PowerTrench SyncFet
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDS6982S Hoja de datos, Descripción, Manual

March 2000
PRELIMINARY
FDS6982S
Dual Notebook Power Supply N-Channel PowerTrenchSyncFet
General Description
The FDS6982S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6982S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
Features
Q2: Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
8.6A, 30V
RDS(on) = 0.016@ VGS = 10V
RDS(on) = 0.021@ VGS = 4.5V
Q1: Optimized for low switching losses
Low Gate Charge ( 8.5 nC typical)
6.3A, 30V
RDS(on) = 0.028@ VGS = 10V
RDS(on) = 0.035@ VGS = 4.5V
D1
D1
D2
D2
SO-8
G1
S1
G2
S2
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6982S
FDS6982S
13”
5
6 Q1
7
Q2
8
4
3
2
1
Q2 Q1
30 30
±20 ±20
8.6 6.3
30 20
2
1.6
1
0.9
-55 to +150
Units
V
V
A
W
°C
78 °C/W
40 °C/W
Tape width
12mm
Quantity
2500 units
1999 Fairchild Semiconductor Corporation
FDS6982S Rev B(W)

1 page




FDS6982S pdf
Typical Characteristics: Q2
10
ID = 11.5A
8
6
VDS = 5V
10V
15V
4
2
0
0 10 20 30 40
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
RDS(ON) LIMIT
10
1
100µs
1ms
10ms
100ms
1s
10s
VGS = 10V
0.1
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
DC
0.01
0.1
1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
3000
2500
2000
1500
1000
500
0
0
CISS
f = 1MHz
VGS = 0 V
COSS
CRSS
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
40
30
20
10
0
0.001
0.01
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
0.1 1
10
t1, TIME (sec)
100 1000
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS6982S Rev B (W)

5 Page





FDS6982S arduino
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A

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